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authorRob Clark <[email protected]>2017-12-31 15:01:51 -0500
committerRob Clark <[email protected]>2018-01-14 16:13:39 -0500
commit39b63c18f1a838d57458ceb99ca58d3c0257c402 (patch)
tree8c91e3bae7d3839ef6ab59816ddfa7ee47e6ffd4 /src/gallium/drivers/freedreno/freedreno_util.h
parent868b02cfb431cbccd2b7d54bdc89100eb7af71b5 (diff)
freedreno/a5xx: texture tiling
Overall a nice 5-10% gain for most games. And more for things like glmark2 texture benchmark. There are some rough edges. In particular, the hardware seems to only support tiling or component swap. (Ie. from hw PoV, ARGB/ABGR/RGBA/ BGRA are all the same format but with different component swap.) For tiled formats, only ARGB is possible. This isn't a big problem for *sampling* since we also have swizzle state there (and since util_format_compose_swizzles() already takes into account the component order, we didn't use COLOR_SWAP for sampling). But it is a problem if you try to render to a tiled BGRA (for example) surface. The next patch introduces a workaround for blitter, so we can generate tiled textures in ABGR/RGBA/BGRA, but that doesn't help the render- target case. To handle that, I think we'd need to keep track that the tiled format is different from the linear format, which seems like it would get extra fun with sampler views/etc. So for now, disabled by default, enable with FD_MESA_DEBUG=ttile. In practice it works fine for all the games I've tried, but makes piglit grumpy. Signed-off-by: Rob Clark <[email protected]>
Diffstat (limited to 'src/gallium/drivers/freedreno/freedreno_util.h')
-rw-r--r--src/gallium/drivers/freedreno/freedreno_util.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/gallium/drivers/freedreno/freedreno_util.h b/src/gallium/drivers/freedreno/freedreno_util.h
index 687d874b007..bfeec4c17dd 100644
--- a/src/gallium/drivers/freedreno/freedreno_util.h
+++ b/src/gallium/drivers/freedreno/freedreno_util.h
@@ -83,6 +83,7 @@ enum adreno_stencil_op fd_stencil_op(unsigned op);
#define FD_DBG_NOINDR 0x40000
#define FD_DBG_NOBLIT 0x80000
#define FD_DBG_HIPRIO 0x100000
+#define FD_DBG_TTILE 0x200000
extern int fd_mesa_debug;
extern bool fd_binning_enabled;