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authorRob Clark <[email protected]>2016-01-10 14:10:08 -0500
committerRob Clark <[email protected]>2016-01-16 14:21:08 -0500
commitfad158a0e01f4c28851477e6d1eb5c8fd67e226b (patch)
treea6d443345a5ab3fc0ab9a0dcb91ef61982f58b1c /src/gallium/drivers/freedreno/freedreno_screen.c
parentcc7ed34df94a389e60221228896332d0ac8ea6c6 (diff)
freedreno/ir3: array rework
Signed-off-by: Rob Clark <[email protected]>
Diffstat (limited to 'src/gallium/drivers/freedreno/freedreno_screen.c')
-rw-r--r--src/gallium/drivers/freedreno/freedreno_screen.c9
1 files changed, 8 insertions, 1 deletions
diff --git a/src/gallium/drivers/freedreno/freedreno_screen.c b/src/gallium/drivers/freedreno/freedreno_screen.c
index a75b04b327a..6562924dae1 100644
--- a/src/gallium/drivers/freedreno/freedreno_screen.c
+++ b/src/gallium/drivers/freedreno/freedreno_screen.c
@@ -400,9 +400,16 @@ fd_screen_get_shader_param(struct pipe_screen *pscreen, unsigned shader,
return 1;
case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
+ /* Technically this should be the same as for TEMP/CONST, since
+ * everything is just normal registers. This is just temporary
+ * hack until load_input/store_output handle arrays in a similar
+ * way as load_var/store_var..
+ */
+ return 0;
case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
- return 1;
+ /* a2xx compiler doesn't handle indirect: */
+ return is_ir3(screen) ? 1 : 0;
case PIPE_SHADER_CAP_SUBROUTINES:
case PIPE_SHADER_CAP_DOUBLES:
case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED: