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authorRob Clark <[email protected]>2017-05-23 12:05:12 -0400
committerRob Clark <[email protected]>2017-05-23 12:26:35 -0400
commit1db28fbbea6e6c3f305783d6211a040ed38f4abf (patch)
tree4189ae454562e8750acd4bbf8b1b4511060f7d5b /src/gallium/drivers/freedreno/freedreno_screen.c
parentcaa64b24ce4ca32addfae2bcd93b59b1e5225d82 (diff)
freedreno/ir3: switch to NIR by default
Now that we lower vars to regs, we no longer regress for anything that does complex dereferences. (With tgsi, derefers are already lowered before tgsi_to_nir, but not with glsl_to_nir.) In fact it actually fixes a few things to bypass tgsi. So make NIR the default (finally!) Signed-off-by: Rob Clark <[email protected]>
Diffstat (limited to 'src/gallium/drivers/freedreno/freedreno_screen.c')
-rw-r--r--src/gallium/drivers/freedreno/freedreno_screen.c17
1 files changed, 2 insertions, 15 deletions
diff --git a/src/gallium/drivers/freedreno/freedreno_screen.c b/src/gallium/drivers/freedreno/freedreno_screen.c
index a783d204546..99a6d3c9c86 100644
--- a/src/gallium/drivers/freedreno/freedreno_screen.c
+++ b/src/gallium/drivers/freedreno/freedreno_screen.c
@@ -75,7 +75,6 @@ static const struct debug_named_value debug_options[] = {
{"shaderdb", FD_DBG_SHADERDB, "Enable shaderdb output"},
{"flush", FD_DBG_FLUSH, "Force flush after every draw"},
{"deqp", FD_DBG_DEQP, "Enable dEQP hacks"},
- {"nir", FD_DBG_NIR, "Prefer NIR as native IR"},
{"inorder", FD_DBG_INORDER,"Disable reordering for draws/blits"},
{"bstat", FD_DBG_BSTAT, "Print batch stats at context destroy"},
{"nogrow", FD_DBG_NOGROW, "Disable \"growable\" cmdstream buffers, even if kernel supports it"},
@@ -521,18 +520,9 @@ fd_screen_get_shader_param(struct pipe_screen *pscreen,
case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
return 16;
case PIPE_SHADER_CAP_PREFERRED_IR:
- switch (shader) {
- case PIPE_SHADER_FRAGMENT:
- case PIPE_SHADER_VERTEX:
- if ((fd_mesa_debug & FD_DBG_NIR) && is_ir3(screen))
- return PIPE_SHADER_IR_NIR;
- return PIPE_SHADER_IR_TGSI;
- default:
- /* tgsi_to_nir doesn't really support much beyond FS/VS: */
- debug_assert(is_ir3(screen));
+ if (is_ir3(screen))
return PIPE_SHADER_IR_NIR;
- }
- break;
+ return PIPE_SHADER_IR_TGSI;
case PIPE_SHADER_CAP_SUPPORTED_IRS:
if (is_ir3(screen)) {
return (1 << PIPE_SHADER_IR_NIR) | (1 << PIPE_SHADER_IR_TGSI);
@@ -568,9 +558,6 @@ fd_screen_get_shader_param(struct pipe_screen *pscreen,
switch(shader)
{
case PIPE_SHADER_FRAGMENT:
- if (!(fd_mesa_debug & FD_DBG_NIR))
- return 0;
- /* fallthrough */
case PIPE_SHADER_COMPUTE:
return 24;
default: