diff options
| author | Rob Clark <[email protected]> | 2013-10-24 17:45:27 -0400 |
|---|---|---|
| committer | Rob Clark <[email protected]> | 2013-10-24 20:21:08 -0400 |
| commit | 4317c4e6e05f84a985ff76a7f66e506681d8e37f (patch) | |
| tree | 3cbfbd6cdc8409130ea9e79ec4faf8506b03efb9 /src/gallium/drivers/freedreno/freedreno_screen.c | |
| parent | bfd30935c996f453fff7345c79dcef4e83d89cfb (diff) | |
freedreno/a3xx: fix const/rel/const-rel encoding
The encoding of constant, relative, and relative-const src registers is
a bit more complex than originally thought, which gives an extra bit to
encode const reg # at expense of taking a bit from relative offset.
In most cases a3xx seems to actually use a scheme whereby it can encode
an extra bit for const register. You have three possible encodings in
thirteen bits:
register: (11 bits for N.c)
00........... rN.c
relative: (10 bits for N)
010.......... r<a0.x + N>
011.......... c<a0.x + N>
const: (12 bits for N.c)
1............ cN.c
Which means we can deal w/ more consts than previously thought.
Signed-off-by: Rob Clark <[email protected]>
Diffstat (limited to 'src/gallium/drivers/freedreno/freedreno_screen.c')
| -rw-r--r-- | src/gallium/drivers/freedreno/freedreno_screen.c | 8 |
1 files changed, 5 insertions, 3 deletions
diff --git a/src/gallium/drivers/freedreno/freedreno_screen.c b/src/gallium/drivers/freedreno/freedreno_screen.c index a038a779029..2be242af191 100644 --- a/src/gallium/drivers/freedreno/freedreno_screen.c +++ b/src/gallium/drivers/freedreno/freedreno_screen.c @@ -267,6 +267,8 @@ static int fd_screen_get_shader_param(struct pipe_screen *pscreen, unsigned shader, enum pipe_shader_cap param) { + struct fd_screen *screen = fd_screen(pscreen); + switch(shader) { case PIPE_SHADER_FRAGMENT: @@ -293,13 +295,13 @@ fd_screen_get_shader_param(struct pipe_screen *pscreen, unsigned shader, case PIPE_SHADER_CAP_MAX_INPUTS: return 32; case PIPE_SHADER_CAP_MAX_TEMPS: - return 256; /* Max native temporaries. */ + return 64; /* Max native temporaries. */ case PIPE_SHADER_CAP_MAX_ADDRS: - /* XXX Isn't this equal to TEMPS? */ return 1; /* Max native address registers */ case PIPE_SHADER_CAP_MAX_CONSTS: + return (screen->gpu_id >= 300) ? 1024 : 64; case PIPE_SHADER_CAP_MAX_CONST_BUFFERS: - return 64; + return 1; case PIPE_SHADER_CAP_MAX_PREDS: return 0; /* nothing uses this */ case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED: |