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authorIlia Mirkin <[email protected]>2015-04-25 01:21:26 -0400
committerIlia Mirkin <[email protected]>2015-04-27 20:17:07 -0400
commit1571da6ac31ade482f5e4adc82eb66d42a1bb389 (patch)
tree863052af23d04f341dcd7e667cbddc3243fca06f /src/gallium/drivers/freedreno/freedreno_program.c
parent0a4cb00c7765dbe26a4dbfad3bb87d6c6ce03919 (diff)
freedreno/a3xx: add Z32F support
32-bit depth buffers are stored as unorm, and thus need special handling when moving to and from gmem. They are copied into gmem by writing depth, and resolved from gmem using a special resolve bit which apparently float-ifies the data. Signed-off-by: Ilia Mirkin <[email protected]>
Diffstat (limited to 'src/gallium/drivers/freedreno/freedreno_program.c')
-rw-r--r--src/gallium/drivers/freedreno/freedreno_program.c19
1 files changed, 16 insertions, 3 deletions
diff --git a/src/gallium/drivers/freedreno/freedreno_program.c b/src/gallium/drivers/freedreno/freedreno_program.c
index 52a165b64af..5e344e69146 100644
--- a/src/gallium/drivers/freedreno/freedreno_program.c
+++ b/src/gallium/drivers/freedreno/freedreno_program.c
@@ -92,7 +92,7 @@ static void * assemble_tgsi(struct pipe_context *pctx,
}
static void *
-fd_prog_blit(struct pipe_context *pctx, int rts)
+fd_prog_blit(struct pipe_context *pctx, int rts, bool depth)
{
int i;
struct ureg_src tc;
@@ -105,6 +105,12 @@ fd_prog_blit(struct pipe_context *pctx, int rts)
for (i = 0; i < rts; i++)
ureg_TEX(ureg, ureg_DECL_output(ureg, TGSI_SEMANTIC_COLOR, i),
TGSI_TEXTURE_2D, tc, ureg_DECL_sampler(ureg, i));
+ if (depth)
+ ureg_TEX(ureg,
+ ureg_writemask(
+ ureg_DECL_output(ureg, TGSI_SEMANTIC_POSITION, 0),
+ TGSI_WRITEMASK_Z),
+ TGSI_TEXTURE_2D, tc, ureg_DECL_sampler(ureg, rts));
ureg_END(ureg);
@@ -128,11 +134,16 @@ void fd_prog_init(struct pipe_context *pctx)
ctx->solid_prog.fp = assemble_tgsi(pctx, solid_fp, true);
ctx->solid_prog.vp = assemble_tgsi(pctx, solid_vp, false);
ctx->blit_prog[0].vp = assemble_tgsi(pctx, blit_vp, false);
- ctx->blit_prog[0].fp = fd_prog_blit(pctx, 1);
+ ctx->blit_prog[0].fp = fd_prog_blit(pctx, 1, false);
for (i = 1; i < ctx->screen->max_rts; i++) {
ctx->blit_prog[i].vp = ctx->blit_prog[0].vp;
- ctx->blit_prog[i].fp = fd_prog_blit(pctx, i + 1);
+ ctx->blit_prog[i].fp = fd_prog_blit(pctx, i + 1, false);
}
+
+ ctx->blit_z.vp = ctx->blit_prog[0].vp;
+ ctx->blit_z.fp = fd_prog_blit(pctx, 0, true);
+ ctx->blit_zs.vp = ctx->blit_prog[0].vp;
+ ctx->blit_zs.fp = fd_prog_blit(pctx, 1, true);
}
void fd_prog_fini(struct pipe_context *pctx)
@@ -145,4 +156,6 @@ void fd_prog_fini(struct pipe_context *pctx)
pctx->delete_vs_state(pctx, ctx->blit_prog[0].vp);
for (i = 0; i < ctx->screen->max_rts; i++)
pctx->delete_fs_state(pctx, ctx->blit_prog[i].fp);
+ pctx->delete_fs_state(pctx, ctx->blit_z.fp);
+ pctx->delete_fs_state(pctx, ctx->blit_zs.fp);
}