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authorRob Clark <[email protected]>2016-05-20 15:36:10 -0400
committerRob Clark <[email protected]>2016-07-30 09:23:42 -0400
commit9bbd239a4039522d7c1023ecb21764679447bb2d (patch)
treede6633fb1936d05c929e34a88987c69884ed45f9 /src/gallium/drivers/freedreno/freedreno_gmem.c
parent12aec78993edface7f530eede9e018b5fa1897b7 (diff)
freedreno: introduce fd_batch
Introduce the batch object, to track a batch/submit's worth of ringbuffers and other bookkeeping. In this first step, just move the ringbuffers into batch, since that is mostly uninteresting churn. For now there is just a single batch at a time. Note that one outcome of this change is that rb's are allocated/freed on each use. But the expectation is that the bo pool in libdrm_freedreno will save us the GEM bo alloc/free which was the initial reason to implement a rb pool in gallium. The purpose of the batch is to eventually facilitate out-of-order rendering, with batches associated to framebuffer state, and tracking the dependencies on other batches. Signed-off-by: Rob Clark <[email protected]>
Diffstat (limited to 'src/gallium/drivers/freedreno/freedreno_gmem.c')
-rw-r--r--src/gallium/drivers/freedreno/freedreno_gmem.c20
1 files changed, 8 insertions, 12 deletions
diff --git a/src/gallium/drivers/freedreno/freedreno_gmem.c b/src/gallium/drivers/freedreno/freedreno_gmem.c
index 0d73349057c..54a3247b933 100644
--- a/src/gallium/drivers/freedreno/freedreno_gmem.c
+++ b/src/gallium/drivers/freedreno/freedreno_gmem.c
@@ -331,7 +331,7 @@ render_tiles(struct fd_context *ctx)
fd_hw_query_prepare_tile(ctx, i, ctx->ring);
/* emit IB to drawcmds: */
- ctx->emit_ib(ctx->ring, ctx->draw_start, ctx->draw_end);
+ ctx->emit_ib(ctx->ring, ctx->batch->draw);
fd_reset_wfi(ctx);
/* emit gmem2mem to transfer tile back to system memory: */
@@ -349,7 +349,7 @@ render_sysmem(struct fd_context *ctx)
fd_hw_query_prepare_tile(ctx, 0, ctx->ring);
/* emit IB to drawcmds: */
- ctx->emit_ib(ctx->ring, ctx->draw_start, ctx->draw_end);
+ ctx->emit_ib(ctx->ring, ctx->batch->draw);
fd_reset_wfi(ctx);
}
@@ -357,6 +357,7 @@ void
fd_gmem_render_tiles(struct fd_context *ctx)
{
struct pipe_framebuffer_state *pfb = &ctx->framebuffer;
+ struct fd_batch *batch = ctx->batch;
bool sysmem = false;
if (ctx->emit_sysmem_prep) {
@@ -371,16 +372,14 @@ fd_gmem_render_tiles(struct fd_context *ctx)
/* close out the draw cmds by making sure any active queries are
* paused:
*/
- fd_hw_query_set_stage(ctx, ctx->ring, FD_STAGE_NULL);
-
- /* mark the end of the clear/draw cmds before emitting per-tile cmds: */
- fd_ringmarker_mark(ctx->draw_end);
- fd_ringmarker_mark(ctx->binning_end);
+ fd_hw_query_set_stage(ctx, batch->draw, FD_STAGE_NULL);
fd_reset_wfi(ctx);
ctx->stats.batch_total++;
+ ctx->ring = batch->gmem;
+
if (sysmem) {
DBG("rendering sysmem (%s/%s)",
util_format_short_name(pipe_surface_format(pfb->cbufs[0])),
@@ -399,12 +398,9 @@ fd_gmem_render_tiles(struct fd_context *ctx)
ctx->stats.batch_gmem++;
}
- /* GPU executes starting from tile cmds, which IB back to draw cmds: */
- fd_ringmarker_flush(ctx->draw_end);
+ fd_ringbuffer_flush(batch->gmem);
- /* mark start for next draw/binning cmds: */
- fd_ringmarker_mark(ctx->draw_start);
- fd_ringmarker_mark(ctx->binning_start);
+ ctx->ring = NULL;
fd_reset_wfi(ctx);