summaryrefslogtreecommitdiffstats
path: root/src/gallium/drivers/freedreno/freedreno_draw.h
diff options
context:
space:
mode:
authorRob Clark <[email protected]>2016-06-27 11:28:37 -0400
committerRob Clark <[email protected]>2016-07-30 09:23:42 -0400
commitf02a64dbdd2ec147167ad60357bd46d8d964290a (patch)
treed4d0a74b53481862a46df052af1653b59e4337b7 /src/gallium/drivers/freedreno/freedreno_draw.h
parenteeafaf2d37cdc7f83f997e8babd8f770243ecf25 (diff)
freedreno: move more batch related tracking to fd_batch
To flush batches out of order, the gmem code needs to not depend on state from fd_context (since that may apply to a more recent batch). So this all moves into batch. The one exception is the gmem/pipe/tile state itself. But this is only used from gmem code (and batches are flushed serially). The alternative would be having to re-calculate GMEM layout on every batch, even if the dimensions of the render targets are the same. Note: This opens up the possibility of pushing gmem/submit into a helper thread. Signed-off-by: Rob Clark <[email protected]>
Diffstat (limited to 'src/gallium/drivers/freedreno/freedreno_draw.h')
-rw-r--r--src/gallium/drivers/freedreno/freedreno_draw.h15
1 files changed, 8 insertions, 7 deletions
diff --git a/src/gallium/drivers/freedreno/freedreno_draw.h b/src/gallium/drivers/freedreno/freedreno_draw.h
index 7a970a28b31..60cd9c09881 100644
--- a/src/gallium/drivers/freedreno/freedreno_draw.h
+++ b/src/gallium/drivers/freedreno/freedreno_draw.h
@@ -42,7 +42,7 @@ struct fd_ringbuffer;
void fd_draw_init(struct pipe_context *pctx);
static inline void
-fd_draw(struct fd_context *ctx, struct fd_ringbuffer *ring,
+fd_draw(struct fd_batch *batch, struct fd_ringbuffer *ring,
enum pc_di_primtype primtype,
enum pc_di_vis_cull_mode vismode,
enum pc_di_src_sel src_sel, uint32_t count,
@@ -59,7 +59,7 @@ fd_draw(struct fd_context *ctx, struct fd_ringbuffer *ring,
*/
emit_marker(ring, 7);
- if (is_a3xx_p0(ctx->screen)) {
+ if (is_a3xx_p0(batch->ctx->screen)) {
/* dummy-draw workaround: */
OUT_PKT3(ring, CP_DRAW_INDX, 3);
OUT_RING(ring, 0x00000000);
@@ -81,7 +81,7 @@ fd_draw(struct fd_context *ctx, struct fd_ringbuffer *ring,
* we know if we are binning or not
*/
OUT_RINGP(ring, DRAW(primtype, src_sel, idx_type, 0, instances),
- &ctx->draw_patches);
+ &batch->draw_patches);
} else {
OUT_RING(ring, DRAW(primtype, src_sel, idx_type, vismode, instances));
}
@@ -93,7 +93,7 @@ fd_draw(struct fd_context *ctx, struct fd_ringbuffer *ring,
emit_marker(ring, 7);
- fd_reset_wfi(ctx);
+ fd_reset_wfi(batch->ctx);
}
@@ -112,18 +112,19 @@ size2indextype(unsigned index_size)
/* this is same for a2xx/a3xx, so split into helper: */
static inline void
-fd_draw_emit(struct fd_context *ctx, struct fd_ringbuffer *ring,
+fd_draw_emit(struct fd_batch *batch, struct fd_ringbuffer *ring,
enum pc_di_primtype primtype,
enum pc_di_vis_cull_mode vismode,
const struct pipe_draw_info *info)
{
- struct pipe_index_buffer *idx = &ctx->indexbuf;
struct pipe_resource *idx_buffer = NULL;
enum pc_di_index_size idx_type = INDEX_SIZE_IGN;
enum pc_di_src_sel src_sel;
uint32_t idx_size, idx_offset;
if (info->indexed) {
+ struct pipe_index_buffer *idx = &batch->ctx->indexbuf;
+
assert(!idx->user_buffer);
idx_buffer = idx->buffer;
@@ -139,7 +140,7 @@ fd_draw_emit(struct fd_context *ctx, struct fd_ringbuffer *ring,
src_sel = DI_SRC_SEL_AUTO_INDEX;
}
- fd_draw(ctx, ring, primtype, vismode, src_sel,
+ fd_draw(batch, ring, primtype, vismode, src_sel,
info->count, info->instance_count - 1,
idx_type, idx_size, idx_offset, idx_buffer);
}