diff options
| author | Rob Clark <[email protected]> | 2014-01-07 10:55:07 -0500 |
|---|---|---|
| committer | Rob Clark <[email protected]> | 2014-01-08 16:30:18 -0500 |
| commit | c0766528baaef48902c87bbdaa4f5926c472269b (patch) | |
| tree | f825706059f50c37a9fda7961ec596b0fb6a65da /src/gallium/drivers/freedreno/freedreno_draw.c | |
| parent | bfb44c24bc1eff850d47984b2cb60c957ffc143d (diff) | |
freedreno/a3xx: support for hw binning pass
The binning pass sorts vertices into which bins/tiles they apply to.
The visibility information generated during the binning pass can be
used to speed up the rendering pass by filtering out vertices which
do not apply to the current tile. See:
https://github.com/freedreno/freedreno/wiki/Adreno-tiling#optimized-approach
This brings a significant fps boost. A rough assortment of tests
(supertuxkart, etracer, tremulous, glmark2 'build' test, etc) seems
to yield a ~35-45% fps improvement.
For now, to be conservative, the binning pass is not enabled yet by
default. To enable it use:
FD_MESA_DEBUG=binning
So far I haven't found anything that breaks with binning enabled,
but I'd like a bit more testing before I enable it as default.
Signed-off-by: Rob Clark <[email protected]>
Diffstat (limited to 'src/gallium/drivers/freedreno/freedreno_draw.c')
| -rw-r--r-- | src/gallium/drivers/freedreno/freedreno_draw.c | 9 |
1 files changed, 6 insertions, 3 deletions
diff --git a/src/gallium/drivers/freedreno/freedreno_draw.c b/src/gallium/drivers/freedreno/freedreno_draw.c index 0069438c87d..d80f3565614 100644 --- a/src/gallium/drivers/freedreno/freedreno_draw.c +++ b/src/gallium/drivers/freedreno/freedreno_draw.c @@ -54,7 +54,9 @@ size2indextype(unsigned index_size) /* this is same for a2xx/a3xx, so split into helper: */ void -fd_draw_emit(struct fd_context *ctx, const struct pipe_draw_info *info) +fd_draw_emit(struct fd_context *ctx, struct fd_ringbuffer *ring, + enum pc_di_vis_cull_mode vismode, + const struct pipe_draw_info *info) { struct pipe_index_buffer *idx = &ctx->indexbuf; struct fd_bo *idx_bo = NULL; @@ -78,8 +80,8 @@ fd_draw_emit(struct fd_context *ctx, const struct pipe_draw_info *info) src_sel = DI_SRC_SEL_AUTO_INDEX; } - fd_draw(ctx, ctx->primtypes[info->mode], src_sel, info->count, - idx_type, idx_size, idx_offset, idx_bo); + fd_draw(ctx, ring, ctx->primtypes[info->mode], vismode, src_sel, + info->count, idx_type, idx_size, idx_offset, idx_bo); } static void @@ -180,6 +182,7 @@ fd_clear(struct pipe_context *pctx, unsigned buffers, ctx->clear(ctx, buffers, color, depth, stencil); ctx->dirty |= FD_DIRTY_ZSA | + FD_DIRTY_VIEWPORT | FD_DIRTY_RASTERIZER | FD_DIRTY_SAMPLE_MASK | FD_DIRTY_PROG | |