diff options
| author | Rob Clark <[email protected]> | 2013-04-24 10:50:51 -0400 |
|---|---|---|
| committer | Rob Clark <[email protected]> | 2013-04-24 21:09:46 -0400 |
| commit | 9495ee12c66798ac776f1a38dbb9c7416ba68c6b (patch) | |
| tree | bb0f92be104808d69d88d8a6cf9986d95f342834 /src/gallium/drivers/freedreno/freedreno_clear.c | |
| parent | d5d6ec884321ceaabe18ec4d33e9a27758696ef9 (diff) | |
freedreno: clear fixes and debugging
Set a few extra registers to make sure we are in proper state for
clearing. And also add some debug options to mark all state dirty in
clear and gmem operations to aid in debugging.
Signed-off-by: Rob Clark <[email protected]>
Diffstat (limited to 'src/gallium/drivers/freedreno/freedreno_clear.c')
| -rw-r--r-- | src/gallium/drivers/freedreno/freedreno_clear.c | 23 |
1 files changed, 22 insertions, 1 deletions
diff --git a/src/gallium/drivers/freedreno/freedreno_clear.c b/src/gallium/drivers/freedreno/freedreno_clear.c index 149c023d6f0..2cdb7bf1120 100644 --- a/src/gallium/drivers/freedreno/freedreno_clear.c +++ b/src/gallium/drivers/freedreno/freedreno_clear.c @@ -67,7 +67,9 @@ fd_clear(struct pipe_context *pctx, unsigned buffers, if (buffers & (PIPE_CLEAR_DEPTH | PIPE_CLEAR_STENCIL)) fd_resource(fb->zsbuf->texture)->dirty = true; - DBG("depth=%f, stencil=%u", depth, stencil); + DBG("%x depth=%f, stencil=%u (%s/%s)", buffers, depth, stencil, + util_format_name(fb->cbufs[0]->format), + fb->zsbuf ? util_format_name(fb->zsbuf->format) : "none"); if ((buffers & PIPE_CLEAR_COLOR) && fb->nr_cbufs) colr = pack_rgba(fb->cbufs[0]->format, color->f); @@ -118,6 +120,9 @@ fd_clear(struct pipe_context *pctx, unsigned buffers, if (buffers & PIPE_CLEAR_DEPTH) reg |= A2XX_RB_COPY_CONTROL_CLEAR_MASK(0xf); break; + default: + assert(1); + break; } } OUT_RING(ring, reg); @@ -155,6 +160,19 @@ fd_clear(struct pipe_context *pctx, unsigned buffers, OUT_RING(ring, reg); OUT_PKT3(ring, CP_SET_CONSTANT, 3); + OUT_RING(ring, CP_REG(REG_A2XX_RB_STENCILREFMASK_BF)); + OUT_RING(ring, 0xff000000 | A2XX_RB_STENCILREFMASK_BF_STENCILWRITEMASK(0xff)); + OUT_RING(ring, 0xff000000 | A2XX_RB_STENCILREFMASK_STENCILWRITEMASK(0xff)); + + OUT_PKT3(ring, CP_SET_CONSTANT, 2); + OUT_RING(ring, CP_REG(REG_A2XX_RB_COLORCONTROL)); + OUT_RING(ring, A2XX_RB_COLORCONTROL_ALPHA_FUNC(FUNC_ALWAYS) | + A2XX_RB_COLORCONTROL_BLEND_DISABLE | + A2XX_RB_COLORCONTROL_ROP_CODE(12) | + A2XX_RB_COLORCONTROL_DITHER_MODE(DITHER_DISABLE) | + A2XX_RB_COLORCONTROL_DITHER_TYPE(DITHER_PIXEL)); + + OUT_PKT3(ring, CP_SET_CONSTANT, 3); OUT_RING(ring, CP_REG(REG_A2XX_PA_CL_CLIP_CNTL)); OUT_RING(ring, 0x00000000); /* PA_CL_CLIP_CNTL */ OUT_RING(ring, A2XX_PA_SU_SC_MODE_CNTL_PROVOKING_VTX_LAST | /* PA_SU_SC_MODE_CNTL */ @@ -202,6 +220,9 @@ fd_clear(struct pipe_context *pctx, unsigned buffers, FD_DIRTY_PROG | FD_DIRTY_CONSTBUF | FD_DIRTY_BLEND; + + if (fd_mesa_debug & FD_DBG_DCLEAR) + ctx->dirty = 0xffffffff; } static void |