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authorRob Clark <[email protected]>2019-07-30 09:34:53 -0700
committerRob Clark <[email protected]>2019-08-02 10:24:14 -0700
commite1790c532a431ad3f8abe36175613f4b5f48fa3f (patch)
tree1b881d9cf207b28f99662775fb360be590dc83ba /src/gallium/drivers/freedreno/a6xx
parentd8379da19ee1c2086cd39a648136a7128f402f58 (diff)
freedreno/a6xx: add missing flush/invalidates for blit
Various things we were missing for multiple blits in a single batch. Signed-off-by: Rob Clark <[email protected]>
Diffstat (limited to 'src/gallium/drivers/freedreno/a6xx')
-rw-r--r--src/gallium/drivers/freedreno/a6xx/fd6_blitter.c22
-rw-r--r--src/gallium/drivers/freedreno/a6xx/fd6_emit.h2
2 files changed, 9 insertions, 15 deletions
diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_blitter.c b/src/gallium/drivers/freedreno/a6xx/fd6_blitter.c
index 51725c4aa75..68cc4e7ab69 100644
--- a/src/gallium/drivers/freedreno/a6xx/fd6_blitter.c
+++ b/src/gallium/drivers/freedreno/a6xx/fd6_blitter.c
@@ -172,21 +172,14 @@ can_do_blit(const struct pipe_blit_info *info)
}
static void
-emit_setup(struct fd_ringbuffer *ring)
+emit_setup(struct fd_batch *batch)
{
- OUT_PKT7(ring, CP_EVENT_WRITE, 1);
- OUT_RING(ring, PC_CCU_INVALIDATE_COLOR);
+ struct fd_ringbuffer *ring = batch->draw;
- OUT_PKT7(ring, CP_EVENT_WRITE, 1);
- OUT_RING(ring, LRZ_FLUSH);
-
- OUT_PKT7(ring, CP_SKIP_IB2_ENABLE_GLOBAL, 1);
- OUT_RING(ring, 0x0);
-
- OUT_WFI5(ring);
-
- OUT_PKT4(ring, REG_A6XX_RB_CCU_CNTL, 1);
- OUT_RING(ring, 0x10000000);
+ fd6_event_write(batch, ring, 0x1d, true);
+ fd6_event_write(batch, ring, FACENESS_FLUSH, true);
+ fd6_event_write(batch, ring, PC_CCU_INVALIDATE_COLOR, false);
+ fd6_event_write(batch, ring, PC_CCU_INVALIDATE_DEPTH, false);
}
static uint32_t
@@ -677,7 +670,7 @@ handle_rgba_blit(struct fd_context *ctx, const struct pipe_blit_info *info)
mtx_unlock(&ctx->screen->lock);
- emit_setup(batch->draw);
+ emit_setup(batch);
if ((info->src.resource->target == PIPE_BUFFER) &&
(info->dst.resource->target == PIPE_BUFFER)) {
@@ -694,6 +687,7 @@ handle_rgba_blit(struct fd_context *ctx, const struct pipe_blit_info *info)
fd6_event_write(batch, batch->draw, 0x1d, true);
fd6_event_write(batch, batch->draw, FACENESS_FLUSH, true);
fd6_event_write(batch, batch->draw, CACHE_FLUSH_TS, true);
+ fd6_cache_inv(batch, batch->draw);
fd_resource(info->dst.resource)->valid = true;
batch->needs_flush = true;
diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_emit.h b/src/gallium/drivers/freedreno/a6xx/fd6_emit.h
index 46a9ca82149..8c411328402 100644
--- a/src/gallium/drivers/freedreno/a6xx/fd6_emit.h
+++ b/src/gallium/drivers/freedreno/a6xx/fd6_emit.h
@@ -146,7 +146,7 @@ fd6_event_write(struct fd_batch *batch, struct fd_ringbuffer *ring,
static inline void
fd6_cache_inv(struct fd_batch *batch, struct fd_ringbuffer *ring)
{
- fd6_event_write(batch, ring, 0x31, false);
+ fd6_event_write(batch, ring, CACHE_INVALIDATE, false);
}
static inline void