diff options
author | Rob Clark <[email protected]> | 2019-06-27 13:37:21 -0700 |
---|---|---|
committer | Rob Clark <[email protected]> | 2019-06-28 13:02:59 -0700 |
commit | 21beddd3bcf46d152bee1dbfd619419d87757c3e (patch) | |
tree | 0667ba183977de95bc0b881baa8eed4557c1c8aa /src/gallium/drivers/freedreno/a6xx | |
parent | b120a02b21791ef9898dd342af8102ec9f4d36d9 (diff) |
freedreno/a6xx: wire up dither state
Fixes:
dEQP-GLES2.functional.fbo.render.recreate_colorbuffer.rebind_rbo_rgba4
dEQP-GLES2.functional.fbo.render.recreate_colorbuffer.no_rebind_rbo_rgba4
dEQP-GLES2.functional.fbo.render.recreate_colorbuffer.no_rebind_rbo_rgba4_stencil_index8
dEQP-GLES2.functional.fbo.render.recreate_depthbuffer.rebind_rbo_rgba4_depth_component16
dEQP-GLES2.functional.fbo.render.recreate_depthbuffer.no_rebind_rbo_rgba4_depth_component16
dEQP-GLES2.functional.fbo.render.recreate_stencilbuffer.rebind_rbo_rgba4_stencil_index8
dEQP-GLES2.functional.fbo.render.recreate_stencilbuffer.no_rebind_rbo_rgba4_stencil_index8
Signed-off-by: Rob Clark <[email protected]>
Reviewed-by: Eric Anholt <[email protected]>
Reviewed-by: Kristian H. Kristensen <[email protected]>
Diffstat (limited to 'src/gallium/drivers/freedreno/a6xx')
-rw-r--r-- | src/gallium/drivers/freedreno/a6xx/fd6_blend.c | 12 | ||||
-rw-r--r-- | src/gallium/drivers/freedreno/a6xx/fd6_blend.h | 1 | ||||
-rw-r--r-- | src/gallium/drivers/freedreno/a6xx/fd6_emit.c | 3 |
3 files changed, 14 insertions, 2 deletions
diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_blend.c b/src/gallium/drivers/freedreno/a6xx/fd6_blend.c index f888e162cf9..f010b1c507c 100644 --- a/src/gallium/drivers/freedreno/a6xx/fd6_blend.c +++ b/src/gallium/drivers/freedreno/a6xx/fd6_blend.c @@ -132,9 +132,17 @@ fd6_blend_state_create(struct pipe_context *pctx, // so->rb_mrt[i].control |= A6XX_RB_MRT_CONTROL_READ_DEST_ENABLE; mrt_blend |= (1 << i); } + } -// if (cso->dither) -// so->rb_mrt[i].buf_info |= A6XX_RB_MRT_BUF_INFO_DITHER_MODE(DITHER_ALWAYS); + if (cso->dither) { + so->rb_dither_cntl = A6XX_RB_DITHER_CNTL_DITHER_MODE_MRT0(DITHER_ALWAYS) | + A6XX_RB_DITHER_CNTL_DITHER_MODE_MRT1(DITHER_ALWAYS) | + A6XX_RB_DITHER_CNTL_DITHER_MODE_MRT2(DITHER_ALWAYS) | + A6XX_RB_DITHER_CNTL_DITHER_MODE_MRT3(DITHER_ALWAYS) | + A6XX_RB_DITHER_CNTL_DITHER_MODE_MRT4(DITHER_ALWAYS) | + A6XX_RB_DITHER_CNTL_DITHER_MODE_MRT5(DITHER_ALWAYS) | + A6XX_RB_DITHER_CNTL_DITHER_MODE_MRT6(DITHER_ALWAYS) | + A6XX_RB_DITHER_CNTL_DITHER_MODE_MRT7(DITHER_ALWAYS); } so->rb_blend_cntl = A6XX_RB_BLEND_CNTL_ENABLE_BLEND(mrt_blend) | diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_blend.h b/src/gallium/drivers/freedreno/a6xx/fd6_blend.h index d59b6628c5b..d44ed8afb88 100644 --- a/src/gallium/drivers/freedreno/a6xx/fd6_blend.h +++ b/src/gallium/drivers/freedreno/a6xx/fd6_blend.h @@ -47,6 +47,7 @@ struct fd6_blend_stateobj { uint32_t blend_control_alpha; } rb_mrt[A6XX_MAX_RENDER_TARGETS]; uint32_t rb_blend_cntl; + uint32_t rb_dither_cntl; uint32_t sp_blend_cntl; }; diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_emit.c b/src/gallium/drivers/freedreno/a6xx/fd6_emit.c index 1240786e4dd..5e8a65c9dd7 100644 --- a/src/gallium/drivers/freedreno/a6xx/fd6_emit.c +++ b/src/gallium/drivers/freedreno/a6xx/fd6_emit.c @@ -984,6 +984,9 @@ fd6_emit_state(struct fd_ringbuffer *ring, struct fd6_emit *emit) OUT_RING(ring, blend_control); } + OUT_PKT4(ring, REG_A6XX_RB_DITHER_CNTL, 1); + OUT_RING(ring, blend->rb_dither_cntl); + OUT_PKT4(ring, REG_A6XX_SP_BLEND_CNTL, 1); OUT_RING(ring, blend->sp_blend_cntl); } |