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authorRob Clark <[email protected]>2017-11-14 14:15:27 -0500
committerRob Clark <[email protected]>2017-11-14 18:10:51 -0500
commitf383cf9d410e3764eda9321f75fd324f6a15138d (patch)
tree04b571190e8db648ff3e150be1e85d4974bc9e4f /src/gallium/drivers/freedreno/a5xx
parentd74029bddcbcd5ca922bb0d5b0e4d405cd962419 (diff)
freedreno/a5xx: split out helper for pipeline stalls
We need a similar thing for indirect draws. Signed-off-by: Rob Clark <[email protected]>
Diffstat (limited to 'src/gallium/drivers/freedreno/a5xx')
-rw-r--r--src/gallium/drivers/freedreno/a5xx/fd5_compute.c7
-rw-r--r--src/gallium/drivers/freedreno/a5xx/fd5_context.h12
2 files changed, 13 insertions, 6 deletions
diff --git a/src/gallium/drivers/freedreno/a5xx/fd5_compute.c b/src/gallium/drivers/freedreno/a5xx/fd5_compute.c
index 362ab1dc544..55cddadf600 100644
--- a/src/gallium/drivers/freedreno/a5xx/fd5_compute.c
+++ b/src/gallium/drivers/freedreno/a5xx/fd5_compute.c
@@ -160,12 +160,7 @@ fd5_launch_grid(struct fd_context *ctx, const struct pipe_grid_info *info)
if (info->indirect) {
struct fd_resource *rsc = fd_resource(info->indirect);
- OUT_PKT7(ring, CP_EVENT_WRITE, 4);
- OUT_RING(ring, CACHE_FLUSH_TS);
- OUT_RELOCW(ring, fd5_context(ctx)->blit_mem, 0, 0, 0); /* ADDR_LO/HI */
- OUT_RING(ring, 0x00000000);
-
- OUT_WFI5(ring);
+ fd5_emit_flush(ctx, ring);
OUT_PKT7(ring, CP_EXEC_CS_INDIRECT, 4);
OUT_RING(ring, 0x00000000);
diff --git a/src/gallium/drivers/freedreno/a5xx/fd5_context.h b/src/gallium/drivers/freedreno/a5xx/fd5_context.h
index f4d885b40f7..37573460c21 100644
--- a/src/gallium/drivers/freedreno/a5xx/fd5_context.h
+++ b/src/gallium/drivers/freedreno/a5xx/fd5_context.h
@@ -93,4 +93,16 @@ fd5_context(struct fd_context *ctx)
struct pipe_context *
fd5_context_create(struct pipe_screen *pscreen, void *priv, unsigned flags);
+/* helper for places where we need to stall CP to wait for previous draws: */
+static inline void
+fd5_emit_flush(struct fd_context *ctx, struct fd_ringbuffer *ring)
+{
+ OUT_PKT7(ring, CP_EVENT_WRITE, 4);
+ OUT_RING(ring, CACHE_FLUSH_TS);
+ OUT_RELOCW(ring, fd5_context(ctx)->blit_mem, 0, 0, 0); /* ADDR_LO/HI */
+ OUT_RING(ring, 0x00000000);
+
+ OUT_WFI5(ring);
+}
+
#endif /* FD5_CONTEXT_H_ */