diff options
| author | Rob Clark <[email protected]> | 2018-09-06 08:44:52 -0400 |
|---|---|---|
| committer | Rob Clark <[email protected]> | 2018-09-27 15:26:32 -0400 |
| commit | 5bb96bf73a1b2a9978c4cb766477e453610345f1 (patch) | |
| tree | 2152e6961738d0f21c51d78b739b915e0251dc32 /src/gallium/drivers/freedreno/a5xx | |
| parent | a7fa44cd33378c6058b8069e6edcae1963c96bd3 (diff) | |
freedreno: simplify pctx->clear()
This is defined to always clear the entire surface(s) specified,
regardless of scissor state.. mesa/st will turn scissored clears
into a draw. So rip about a bunch of unnecessary machinery.
Also remove a comment that was obsolete since using u_blitter to
turn clear into draw (for the cases where there isn't a hw blitter
fast-path).
Signed-off-by: Rob Clark <[email protected]>
Diffstat (limited to 'src/gallium/drivers/freedreno/a5xx')
| -rw-r--r-- | src/gallium/drivers/freedreno/a5xx/fd5_draw.c | 6 |
1 files changed, 0 insertions, 6 deletions
diff --git a/src/gallium/drivers/freedreno/a5xx/fd5_draw.c b/src/gallium/drivers/freedreno/a5xx/fd5_draw.c index aa06b3c7148..96ff1a35945 100644 --- a/src/gallium/drivers/freedreno/a5xx/fd5_draw.c +++ b/src/gallium/drivers/freedreno/a5xx/fd5_draw.c @@ -271,17 +271,11 @@ fd5_clear(struct fd_context *ctx, unsigned buffers, { struct fd_ringbuffer *ring = ctx->batch->draw; struct pipe_framebuffer_state *pfb = &ctx->batch->framebuffer; - struct pipe_scissor_state *scissor = fd_context_get_scissor(ctx); if ((buffers & (PIPE_CLEAR_DEPTH | PIPE_CLEAR_STENCIL)) && is_z32(pfb->zsbuf->format)) return false; - ctx->batch->max_scissor.minx = MIN2(ctx->batch->max_scissor.minx, scissor->minx); - ctx->batch->max_scissor.miny = MIN2(ctx->batch->max_scissor.miny, scissor->miny); - ctx->batch->max_scissor.maxx = MAX2(ctx->batch->max_scissor.maxx, scissor->maxx); - ctx->batch->max_scissor.maxy = MAX2(ctx->batch->max_scissor.maxy, scissor->maxy); - fd5_emit_render_cntl(ctx, true, false); if (buffers & PIPE_CLEAR_COLOR) { |