diff options
| author | Eric Anholt <[email protected]> | 2020-04-22 11:48:44 -0700 |
|---|---|---|
| committer | Marge Bot <[email protected]> | 2020-04-27 19:06:57 +0000 |
| commit | b34ee185f44c6d473e4e343d1e9f406a25dae67f (patch) | |
| tree | 4d2c623cf0ca476eb5cdef8f29302e5f9819b850 /src/gallium/drivers/freedreno/a5xx | |
| parent | fa49a5032f33802fc136ba7095edaf06df1efa33 (diff) | |
freedreno: Fix derivatives without texturing on a3xx-a5xx.
The shader variant tells us if we should set the PIXLODENABLE flag.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4685>
Diffstat (limited to 'src/gallium/drivers/freedreno/a5xx')
| -rw-r--r-- | src/gallium/drivers/freedreno/a5xx/fd5_program.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/gallium/drivers/freedreno/a5xx/fd5_program.c b/src/gallium/drivers/freedreno/a5xx/fd5_program.c index a2fe505b4dd..72f9f99335f 100644 --- a/src/gallium/drivers/freedreno/a5xx/fd5_program.c +++ b/src/gallium/drivers/freedreno/a5xx/fd5_program.c @@ -407,7 +407,7 @@ fd5_program_emit(struct fd_context *ctx, struct fd_ringbuffer *ring, A5XX_SP_VS_CTRL_REG0_FULLREGFOOTPRINT(s[VS].i->max_reg + 1) | 0x6 | /* XXX seems to be always set? */ A5XX_SP_VS_CTRL_REG0_BRANCHSTACK(s[VS].v->branchstack) | - COND(s[VS].v->num_samp > 0, A5XX_SP_VS_CTRL_REG0_PIXLODENABLE)); + COND(s[VS].v->need_pixlod, A5XX_SP_VS_CTRL_REG0_PIXLODENABLE)); struct ir3_shader_linkage l = {0}; ir3_link_shaders(&l, s[VS].v, s[FS].v, true); @@ -524,7 +524,7 @@ fd5_program_emit(struct fd_context *ctx, struct fd_ringbuffer *ring, A5XX_SP_FS_CTRL_REG0_HALFREGFOOTPRINT(s[FS].i->max_half_reg + 1) | A5XX_SP_FS_CTRL_REG0_FULLREGFOOTPRINT(s[FS].i->max_reg + 1) | A5XX_SP_FS_CTRL_REG0_BRANCHSTACK(s[FS].v->branchstack) | - COND(s[FS].v->num_samp > 0, A5XX_SP_FS_CTRL_REG0_PIXLODENABLE)); + COND(s[FS].v->need_pixlod, A5XX_SP_FS_CTRL_REG0_PIXLODENABLE)); OUT_PKT4(ring, REG_A5XX_HLSQ_UPDATE_CNTL, 1); OUT_RING(ring, 0x020fffff); /* XXX */ |