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author | Samuel Pitoiset <[email protected]> | 2017-06-30 18:48:12 +0200 |
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committer | Samuel Pitoiset <[email protected]> | 2017-07-07 09:09:39 +0200 |
commit | a584a12308228998b24e2b3dd5c15b8dd651a49b (patch) | |
tree | 15f1fa5abdcd71589d553341698c306da46eb7de /src/gallium/drivers/freedreno/a5xx/a5xx.xml.h | |
parent | 43dea65ad2e8259330849aa7a3e1ed86db5a5d0f (diff) |
radeonsi: fix invalidating bindless buffer descriptors
The VA is stored at [4:5], not [0:1]. This invalidated all
texture buffer descriptors when they were made resident in
the current context.
This removes few partial flushes and cache invalidations which
are needed when updating a bindless descriptor on the fly with
a WRITE_DATA packet.
Signed-off-by: Samuel Pitoiset <[email protected]>
Reviewed-by: Nicolai Hähnle <[email protected]>
Diffstat (limited to 'src/gallium/drivers/freedreno/a5xx/a5xx.xml.h')
0 files changed, 0 insertions, 0 deletions