diff options
| author | Ilia Mirkin <[email protected]> | 2015-11-18 23:54:25 -0500 |
|---|---|---|
| committer | Ilia Mirkin <[email protected]> | 2015-11-19 19:00:17 -0500 |
| commit | 0a4462ad6ee921ed805ad51e330b819b95ee90d6 (patch) | |
| tree | d06466a796c105f0300d3d326038dc85005d7eca /src/gallium/drivers/freedreno/a4xx | |
| parent | 0cfc1304bece9cbc17a39b009956b2830c6fd2f5 (diff) | |
freedreno/a4xx: support lod_bias
The lower layers assume that we support this, and it's been core since
GL 1.4. This fixes a slew of piglit tests, especially around
tex-miplevel-selection.
Signed-off-by: Ilia Mirkin <[email protected]>
Cc: [email protected]
Diffstat (limited to 'src/gallium/drivers/freedreno/a4xx')
| -rw-r--r-- | src/gallium/drivers/freedreno/a4xx/a4xx.xml.h | 6 | ||||
| -rw-r--r-- | src/gallium/drivers/freedreno/a4xx/fd4_texture.c | 1 |
2 files changed, 7 insertions, 0 deletions
diff --git a/src/gallium/drivers/freedreno/a4xx/a4xx.xml.h b/src/gallium/drivers/freedreno/a4xx/a4xx.xml.h index 76f525cb0c2..07d0db16cde 100644 --- a/src/gallium/drivers/freedreno/a4xx/a4xx.xml.h +++ b/src/gallium/drivers/freedreno/a4xx/a4xx.xml.h @@ -2741,6 +2741,12 @@ static inline uint32_t A4XX_TEX_SAMP_0_ANISO(enum a4xx_tex_aniso val) { return ((val) << A4XX_TEX_SAMP_0_ANISO__SHIFT) & A4XX_TEX_SAMP_0_ANISO__MASK; } +#define A4XX_TEX_SAMP_0_LOD_BIAS__MASK 0xfff80000 +#define A4XX_TEX_SAMP_0_LOD_BIAS__SHIFT 19 +static inline uint32_t A4XX_TEX_SAMP_0_LOD_BIAS(float val) +{ + return ((((int32_t)(val * 256.0))) << A4XX_TEX_SAMP_0_LOD_BIAS__SHIFT) & A4XX_TEX_SAMP_0_LOD_BIAS__MASK; +} #define REG_A4XX_TEX_SAMP_1 0x00000001 #define A4XX_TEX_SAMP_1_COMPARE_FUNC__MASK 0x0000000e diff --git a/src/gallium/drivers/freedreno/a4xx/fd4_texture.c b/src/gallium/drivers/freedreno/a4xx/fd4_texture.c index 297854f6505..886b4547929 100644 --- a/src/gallium/drivers/freedreno/a4xx/fd4_texture.c +++ b/src/gallium/drivers/freedreno/a4xx/fd4_texture.c @@ -127,6 +127,7 @@ fd4_sampler_state_create(struct pipe_context *pctx, COND(!cso->normalized_coords, A4XX_TEX_SAMP_1_UNNORM_COORDS); if (cso->min_mip_filter != PIPE_TEX_MIPFILTER_NONE) { + so->texsamp0 |= A4XX_TEX_SAMP_0_LOD_BIAS(cso->lod_bias); so->texsamp1 |= A4XX_TEX_SAMP_1_MIN_LOD(cso->min_lod) | A4XX_TEX_SAMP_1_MAX_LOD(cso->max_lod); |