diff options
author | Rob Clark <[email protected]> | 2015-02-21 13:39:06 -0500 |
---|---|---|
committer | Rob Clark <[email protected]> | 2015-02-21 17:11:02 -0500 |
commit | bdf023482a6fd07adef090fb66a4aaaac22810fc (patch) | |
tree | bff8acc78c6630eb1a57c85ccc304eda74621cde /src/gallium/drivers/freedreno/a4xx/fd4_program.c | |
parent | 9153dd4b7eb95728aa9746a45a9dd136458d0213 (diff) |
freedreno/a4xx: bit of cleanup
Signed-off-by: Rob Clark <[email protected]>
Diffstat (limited to 'src/gallium/drivers/freedreno/a4xx/fd4_program.c')
-rw-r--r-- | src/gallium/drivers/freedreno/a4xx/fd4_program.c | 42 |
1 files changed, 22 insertions, 20 deletions
diff --git a/src/gallium/drivers/freedreno/a4xx/fd4_program.c b/src/gallium/drivers/freedreno/a4xx/fd4_program.c index cbfd8b2d4cc..776e4a16b14 100644 --- a/src/gallium/drivers/freedreno/a4xx/fd4_program.c +++ b/src/gallium/drivers/freedreno/a4xx/fd4_program.c @@ -420,8 +420,28 @@ fd4_program_emit(struct fd_ringbuffer *ring, struct fd4_emit *emit) COND(s[VS].v->writes_psize, A4XX_VPC_ATTR_PSIZE)); OUT_RING(ring, 0x00000000); } else { - uint32_t vinterp[8] = {0}, flatshade[2] = {0}; + uint32_t vinterp[8], flatshade[2]; + memset(vinterp, 0, sizeof(vinterp)); + memset(flatshade, 0, sizeof(flatshade)); + + /* TODO: looks like we need to do int varyings in the frag + * shader on a4xx (no flatshad reg?): + * + * (sy)(ss)nop + * (sy)ldlv.u32 r0.x,l[r0.x], 1 + * ldlv.u32 r0.y,l[r0.x+1], 1 + * (ss)bary.f (ei)r63.x, 0, r0.x + * (ss)(rpt1)cov.s32f16 hr0.x, (r)r0.x + * (rpt5)nop + * sam (f16)(xyzw)hr0.x, hr0.x, s#0, t#0 + * + * for now, don't set FLAT on vinterp[], since that + * at least works well enough for pure float impl (ie. + * pre glsl130).. we'll have to do a bit more work to + * handle this properly: + */ +#if 0 /* figure out VARYING_INTERP / FLAT_SHAD register values: */ for (j = -1; (j = ir3_next_varying(s[FS].v, j)) < (int)s[FS].v->inputs_count; ) { uint32_t interp = s[FS].v->inputs[j].interpolate; @@ -443,25 +463,7 @@ fd4_program_emit(struct fd_ringbuffer *ring, struct fd4_emit *emit) } } } - - /* HACK: looks like we need to do int varyings in the frag - * shader on a4xx (no flatshad reg?): - * - * (sy)(ss)nop - * (sy)ldlv.u32 r0.x,l[r0.x], 1 - * ldlv.u32 r0.y,l[r0.x+1], 1 - * (ss)bary.f (ei)r63.x, 0, r0.x - * (ss)(rpt1)cov.s32f16 hr0.x, (r)r0.x - * (rpt5)nop - * sam (f16)(xyzw)hr0.x, hr0.x, s#0, t#0 - * - * for now, don't set FLAT on vinterp[], since that - * at least works well enough for pure float impl (ie. - * pre glsl130).. we'll have to do a bit more work to - * handle this properly: - */ - for (i = 0; i < ARRAY_SIZE(vinterp); i++) - vinterp[i] = 0; +#endif OUT_PKT0(ring, REG_A4XX_VPC_ATTR, 2); OUT_RING(ring, A4XX_VPC_ATTR_TOTALATTR(s[FS].v->total_in) | |