diff options
| author | Rob Clark <[email protected]> | 2016-12-21 22:43:52 -0500 |
|---|---|---|
| committer | Rob Clark <[email protected]> | 2016-12-27 16:54:01 -0500 |
| commit | fc10dc9fdea6ad7d04dfcdb8fd2e2d59ea67f68b (patch) | |
| tree | 29cfc9e21b74aa6856baaab54e4e9787ee248747 /src/gallium/drivers/freedreno/a3xx | |
| parent | 09202cde7e6a11b689676cafd25cc965014415f3 (diff) | |
freedreno/ir3: rework location of driver constants
Rework how we lay out driver constants (driver-params, UBO/TFBO buffer
addresses, immediates) for more flexibility. For a5xx+ we need to deal
with the fact that gpu ptrs are 64b instead of 32b, which makes the
fixed offset scheme not work so well. While we are dealing with that
we might also make the layout more dynamic to account for varying # of
UBOs, etc.
Signed-off-by: Rob Clark <[email protected]>
Diffstat (limited to 'src/gallium/drivers/freedreno/a3xx')
| -rw-r--r-- | src/gallium/drivers/freedreno/a3xx/fd3_emit.c | 9 |
1 files changed, 6 insertions, 3 deletions
diff --git a/src/gallium/drivers/freedreno/a3xx/fd3_emit.c b/src/gallium/drivers/freedreno/a3xx/fd3_emit.c index 95e6d26591c..6c3458a3b08 100644 --- a/src/gallium/drivers/freedreno/a3xx/fd3_emit.c +++ b/src/gallium/drivers/freedreno/a3xx/fd3_emit.c @@ -96,16 +96,16 @@ static void fd3_emit_const_bo(struct fd_ringbuffer *ring, enum shader_t type, boolean write, uint32_t regid, uint32_t num, struct pipe_resource **prscs, uint32_t *offsets) { + uint32_t anum = align(num, 4); uint32_t i; debug_assert((regid % 4) == 0); - debug_assert((num % 4) == 0); - OUT_PKT3(ring, CP_LOAD_STATE, 2 + num); + OUT_PKT3(ring, CP_LOAD_STATE, 2 + anum); OUT_RING(ring, CP_LOAD_STATE_0_DST_OFF(regid/2) | CP_LOAD_STATE_0_STATE_SRC(SS_DIRECT) | CP_LOAD_STATE_0_STATE_BLOCK(sb[type]) | - CP_LOAD_STATE_0_NUM_UNIT(num/2)); + CP_LOAD_STATE_0_NUM_UNIT(anum/2)); OUT_RING(ring, CP_LOAD_STATE_1_EXT_SRC_ADDR(0) | CP_LOAD_STATE_1_STATE_TYPE(ST_CONSTANTS)); @@ -120,6 +120,9 @@ fd3_emit_const_bo(struct fd_ringbuffer *ring, enum shader_t type, boolean write, OUT_RING(ring, 0xbad00000 | (i << 16)); } } + + for (; i < anum; i++) + OUT_RING(ring, 0xffffffff); } #define VERT_TEX_OFF 0 |