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authorRob Clark <[email protected]>2016-07-19 13:22:01 -0400
committerRob Clark <[email protected]>2016-07-30 09:23:42 -0400
commit9f0eb6952790bffe2670f26d399f15acec199cac (patch)
tree5f432f9e957c065bd9a27f615ac286583afd2e9b /src/gallium/drivers/freedreno/a3xx
parente6bfe1c7734cfbf41a763797527db6cb49fa1566 (diff)
freedreno: drop needs_rb_fbd
We need to emit RB_FRAME_BUFFER_DIMENSION once per batch.. tracking this in fd_context is wrong when the gmem code executes asynchronously from the flush_queue worker. But in fact we don't really need to track it at all. We cannot assume previous value at the beginning of the batch (because of other processes potentially using the GPU), so just drop the tracking and emit it in _tile_init(). Signed-off-by: Rob Clark <[email protected]>
Diffstat (limited to 'src/gallium/drivers/freedreno/a3xx')
-rw-r--r--src/gallium/drivers/freedreno/a3xx/fd3_emit.c2
-rw-r--r--src/gallium/drivers/freedreno/a3xx/fd3_gmem.c15
2 files changed, 6 insertions, 11 deletions
diff --git a/src/gallium/drivers/freedreno/a3xx/fd3_emit.c b/src/gallium/drivers/freedreno/a3xx/fd3_emit.c
index 0aef89f4054..0fb2ee1181f 100644
--- a/src/gallium/drivers/freedreno/a3xx/fd3_emit.c
+++ b/src/gallium/drivers/freedreno/a3xx/fd3_emit.c
@@ -896,8 +896,6 @@ fd3_emit_restore(struct fd_batch *batch, struct fd_ringbuffer *ring)
fd_wfi(batch, ring);
fd_hw_query_enable(batch, ring);
-
- ctx->needs_rb_fbd = true;
}
static void
diff --git a/src/gallium/drivers/freedreno/a3xx/fd3_gmem.c b/src/gallium/drivers/freedreno/a3xx/fd3_gmem.c
index 34e0e39aad7..ec0a77b4140 100644
--- a/src/gallium/drivers/freedreno/a3xx/fd3_gmem.c
+++ b/src/gallium/drivers/freedreno/a3xx/fd3_gmem.c
@@ -924,6 +924,7 @@ static void
fd3_emit_tile_init(struct fd_batch *batch)
{
struct fd_ringbuffer *ring = batch->gmem;
+ struct pipe_framebuffer_state *pfb = &batch->framebuffer;
struct fd_gmem_stateobj *gmem = &batch->ctx->gmem;
uint32_t rb_render_control;
@@ -938,6 +939,11 @@ fd3_emit_tile_init(struct fd_batch *batch)
update_vsc_pipe(batch);
+ fd_wfi(batch, ring);
+ OUT_PKT0(ring, REG_A3XX_RB_FRAME_BUFFER_DIMENSION, 1);
+ OUT_RING(ring, A3XX_RB_FRAME_BUFFER_DIMENSION_WIDTH(pfb->width) |
+ A3XX_RB_FRAME_BUFFER_DIMENSION_HEIGHT(pfb->height));
+
if (use_hw_binning(batch)) {
/* emit hw binning pass: */
emit_binning_pass(batch);
@@ -957,18 +963,9 @@ fd3_emit_tile_init(struct fd_batch *batch)
static void
fd3_emit_tile_prep(struct fd_batch *batch, struct fd_tile *tile)
{
- struct fd_context *ctx = batch->ctx;
struct fd_ringbuffer *ring = batch->gmem;
struct pipe_framebuffer_state *pfb = &batch->framebuffer;
- if (ctx->needs_rb_fbd) {
- fd_wfi(batch, ring);
- OUT_PKT0(ring, REG_A3XX_RB_FRAME_BUFFER_DIMENSION, 1);
- OUT_RING(ring, A3XX_RB_FRAME_BUFFER_DIMENSION_WIDTH(pfb->width) |
- A3XX_RB_FRAME_BUFFER_DIMENSION_HEIGHT(pfb->height));
- ctx->needs_rb_fbd = false;
- }
-
OUT_PKT0(ring, REG_A3XX_RB_MODE_CONTROL, 1);
OUT_RING(ring, A3XX_RB_MODE_CONTROL_RENDER_MODE(RB_RENDERING_PASS) |
A3XX_RB_MODE_CONTROL_MARB_CACHE_SPLIT_MODE |