diff options
author | Rob Clark <[email protected]> | 2014-03-29 11:06:49 -0400 |
---|---|---|
committer | Rob Clark <[email protected]> | 2014-03-30 09:50:24 -0400 |
commit | 2346ea6347bd59a92638d94c12ef731bbfcd720a (patch) | |
tree | 9855ffcef8de49118ca42071f330152b138d4146 /src/gallium/drivers/freedreno/a3xx | |
parent | ae5efaf2859db722cb8ef9be5ae5807068cbc1e5 (diff) |
freedreno/a3xx: missing wfi
RB_FRAME_BUFFER_DIMENSION is not a banked context register, so we need
to wait for the GPU to idle before updating it. But we'd rather not
have unnecessary WFI's, so actually keep track if we need to emit it or
not.
Signed-off-by: Rob Clark <[email protected]>
Diffstat (limited to 'src/gallium/drivers/freedreno/a3xx')
-rw-r--r-- | src/gallium/drivers/freedreno/a3xx/fd3_emit.c | 2 | ||||
-rw-r--r-- | src/gallium/drivers/freedreno/a3xx/fd3_gmem.c | 10 |
2 files changed, 9 insertions, 3 deletions
diff --git a/src/gallium/drivers/freedreno/a3xx/fd3_emit.c b/src/gallium/drivers/freedreno/a3xx/fd3_emit.c index 365cb37fc59..00f1014444b 100644 --- a/src/gallium/drivers/freedreno/a3xx/fd3_emit.c +++ b/src/gallium/drivers/freedreno/a3xx/fd3_emit.c @@ -680,4 +680,6 @@ fd3_emit_restore(struct fd_context *ctx) emit_cache_flush(ring); fd_wfi(ctx, ring); + + ctx->needs_rb_fbd = true; } diff --git a/src/gallium/drivers/freedreno/a3xx/fd3_gmem.c b/src/gallium/drivers/freedreno/a3xx/fd3_gmem.c index 72fe6f766f8..2d4763d8fad 100644 --- a/src/gallium/drivers/freedreno/a3xx/fd3_gmem.c +++ b/src/gallium/drivers/freedreno/a3xx/fd3_gmem.c @@ -839,9 +839,13 @@ fd3_emit_tile_prep(struct fd_context *ctx, struct fd_tile *tile) OUT_RING(ring, 0x00000000); } - OUT_PKT0(ring, REG_A3XX_RB_FRAME_BUFFER_DIMENSION, 1); - OUT_RING(ring, A3XX_RB_FRAME_BUFFER_DIMENSION_WIDTH(pfb->width) | - A3XX_RB_FRAME_BUFFER_DIMENSION_HEIGHT(pfb->height)); + if (ctx->needs_rb_fbd) { + fd_wfi(ctx, ring); + OUT_PKT0(ring, REG_A3XX_RB_FRAME_BUFFER_DIMENSION, 1); + OUT_RING(ring, A3XX_RB_FRAME_BUFFER_DIMENSION_WIDTH(pfb->width) | + A3XX_RB_FRAME_BUFFER_DIMENSION_HEIGHT(pfb->height)); + ctx->needs_rb_fbd = false; + } OUT_PKT0(ring, REG_A3XX_RB_MODE_CONTROL, 1); OUT_RING(ring, A3XX_RB_MODE_CONTROL_RENDER_MODE(RB_RENDERING_PASS) | |