diff options
| author | Rob Clark <[email protected]> | 2015-09-10 17:25:18 -0400 |
|---|---|---|
| committer | Rob Clark <[email protected]> | 2015-09-17 19:55:43 -0400 |
| commit | e523f69b1d2f0cb3ff7659e3c55b9a2e40240c9c (patch) | |
| tree | 297df077ee72e725c652d071e288b319a24e77c6 /src/gallium/drivers/freedreno/a3xx | |
| parent | e844e1007d3baac09ff2cc78879d6974be18ecaf (diff) | |
freedreno/ir3: switch to shader_enums.h interp constants
A small step towards un-TGSI'ifying ir3.
Signed-off-by: Rob Clark <[email protected]>
Diffstat (limited to 'src/gallium/drivers/freedreno/a3xx')
| -rw-r--r-- | src/gallium/drivers/freedreno/a3xx/fd3_program.c | 5 |
1 files changed, 2 insertions, 3 deletions
diff --git a/src/gallium/drivers/freedreno/a3xx/fd3_program.c b/src/gallium/drivers/freedreno/a3xx/fd3_program.c index b5360797745..ef8a849617f 100644 --- a/src/gallium/drivers/freedreno/a3xx/fd3_program.c +++ b/src/gallium/drivers/freedreno/a3xx/fd3_program.c @@ -394,7 +394,6 @@ fd3_program_emit(struct fd_ringbuffer *ring, struct fd3_emit *emit, /* figure out VARYING_INTERP / FLAT_SHAD register values: */ for (j = -1; (j = ir3_next_varying(fp, j)) < (int)fp->inputs_count; ) { - uint32_t interp = fp->inputs[j].interpolate; /* TODO might be cleaner to just +8 in SP_VS_VPC_DST_REG * instead.. rather than -8 everywhere else.. @@ -406,8 +405,8 @@ fd3_program_emit(struct fd_ringbuffer *ring, struct fd3_emit *emit, */ debug_assert((inloc % 4) == 0); - if ((interp == TGSI_INTERPOLATE_CONSTANT) || - ((interp == TGSI_INTERPOLATE_COLOR) && emit->rasterflat)) { + if ((fp->inputs[j].interpolate == INTERP_QUALIFIER_FLAT) || + (fp->inputs[j].rasterflat && emit->rasterflat)) { uint32_t loc = inloc; for (i = 0; i < 4; i++, loc++) { vinterp[loc / 16] |= FLAT << ((loc % 16) * 2); |