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authorRob Clark <[email protected]>2015-07-31 09:36:31 -0400
committerRob Clark <[email protected]>2015-08-04 16:03:45 -0400
commita221f8d9ebb4ef43a83ef638458d1338dfe1e517 (patch)
treed2e39e9421454b603c4f6bf1f355611eee71ffe1 /src/gallium/drivers/freedreno/a3xx
parent5f247a9656cb8a0eccdc98ef5911ed15c1248dfb (diff)
freedreno: small bit of cleanup about max rendertargets
We hard-coded 4 or 8 as the max in various places. Switch it all to a define since the limit will go up with a4xx (and maybe even again in the future?) Signed-off-by: Rob Clark <[email protected]>
Diffstat (limited to 'src/gallium/drivers/freedreno/a3xx')
-rw-r--r--src/gallium/drivers/freedreno/a3xx/fd3_blend.h4
-rw-r--r--src/gallium/drivers/freedreno/a3xx/fd3_draw.c2
-rw-r--r--src/gallium/drivers/freedreno/a3xx/fd3_gmem.c2
-rw-r--r--src/gallium/drivers/freedreno/a3xx/fd3_program.c4
4 files changed, 8 insertions, 4 deletions
diff --git a/src/gallium/drivers/freedreno/a3xx/fd3_blend.h b/src/gallium/drivers/freedreno/a3xx/fd3_blend.h
index 0267001b0b9..142df7c300f 100644
--- a/src/gallium/drivers/freedreno/a3xx/fd3_blend.h
+++ b/src/gallium/drivers/freedreno/a3xx/fd3_blend.h
@@ -32,6 +32,8 @@
#include "pipe/p_state.h"
#include "pipe/p_context.h"
+#include "freedreno_util.h"
+
struct fd3_blend_stateobj {
struct pipe_blend_state base;
struct {
@@ -42,7 +44,7 @@ struct fd3_blend_stateobj {
/* Blend control bits for alpha channel */
uint32_t blend_control_alpha;
uint32_t control;
- } rb_mrt[4];
+ } rb_mrt[A3XX_MAX_RENDER_TARGETS];
};
static inline struct fd3_blend_stateobj *
diff --git a/src/gallium/drivers/freedreno/a3xx/fd3_draw.c b/src/gallium/drivers/freedreno/a3xx/fd3_draw.c
index fc30d4842ba..43550ae6a22 100644
--- a/src/gallium/drivers/freedreno/a3xx/fd3_draw.c
+++ b/src/gallium/drivers/freedreno/a3xx/fd3_draw.c
@@ -324,7 +324,7 @@ fd3_clear(struct fd_context *ctx, unsigned buffers,
A3XX_RB_STENCIL_CONTROL_ZFAIL_BF(STENCIL_KEEP));
}
- for (i = 0; i < 4; i++) {
+ for (i = 0; i < A3XX_MAX_RENDER_TARGETS; i++) {
OUT_PKT0(ring, REG_A3XX_RB_MRT_CONTROL(i), 1);
OUT_RING(ring, A3XX_RB_MRT_CONTROL_ROP_CODE(ROP_COPY) |
A3XX_RB_MRT_CONTROL_DITHER_MODE(DITHER_ALWAYS) |
diff --git a/src/gallium/drivers/freedreno/a3xx/fd3_gmem.c b/src/gallium/drivers/freedreno/a3xx/fd3_gmem.c
index 7d3975761dd..4689085e516 100644
--- a/src/gallium/drivers/freedreno/a3xx/fd3_gmem.c
+++ b/src/gallium/drivers/freedreno/a3xx/fd3_gmem.c
@@ -57,7 +57,7 @@ emit_mrt(struct fd_ringbuffer *ring, unsigned nr_bufs,
tile_mode = LINEAR;
}
- for (i = 0; i < 4; i++) {
+ for (i = 0; i < A3XX_MAX_RENDER_TARGETS; i++) {
enum pipe_format pformat = 0;
enum a3xx_color_fmt format = 0;
enum a3xx_color_swap swap = WZYX;
diff --git a/src/gallium/drivers/freedreno/a3xx/fd3_program.c b/src/gallium/drivers/freedreno/a3xx/fd3_program.c
index 7cd4885ab4f..e98c6b5cff4 100644
--- a/src/gallium/drivers/freedreno/a3xx/fd3_program.c
+++ b/src/gallium/drivers/freedreno/a3xx/fd3_program.c
@@ -136,6 +136,8 @@ fd3_program_emit(struct fd_ringbuffer *ring, struct fd3_emit *emit,
int constmode;
int i, j, k;
+ debug_assert(nr <= ARRAY_SIZE(color_regid));
+
vp = fd3_emit_get_vp(emit);
if (emit->key.binning_pass) {
@@ -207,7 +209,7 @@ fd3_program_emit(struct fd_ringbuffer *ring, struct fd3_emit *emit,
unsigned idx = sem2idx(sem);
if (sem2name(sem) != TGSI_SEMANTIC_COLOR)
continue;
- assert(idx < 4);
+ debug_assert(idx < ARRAY_SIZE(color_regid));
color_regid[idx] = fp->outputs[i].regid;
}
}