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| author | Lucas Stach <[email protected]> | 2016-11-21 12:27:47 +0100 |
|---|---|---|
| committer | Lucas Stach <[email protected]> | 2017-04-11 16:52:22 +0200 |
| commit | 52f6c8cc31f553ba2005892fcf2ca9b5f10bac91 (patch) | |
| tree | 6d47af373c2d8c5c6c434468335def047416c405 /src/gallium/drivers/etnaviv/etnaviv_rasterizer.c | |
| parent | 37622ecc795e655ab0264c44dbe6188d9d9d3813 (diff) | |
etnaviv: align TS surface size to number of pixel pipes
The TS surface gets cleared by a tiled RS fill. If the chip has
more than 1 pixel pipe the size of the TS surface needs to be
aligned so that each pipe address matches a tile start, otherwise
the RS will hang.
Signed-off-by: Lucas Stach <[email protected]>
Reviewed-by: Wladimir J. van der Laan <[email protected]>
Diffstat (limited to 'src/gallium/drivers/etnaviv/etnaviv_rasterizer.c')
0 files changed, 0 insertions, 0 deletions