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authorIan Romanick <[email protected]>2008-03-18 10:26:45 -0700
committerIan Romanick <[email protected]>2008-03-18 10:28:39 -0700
commit5fdaebc51c5433ebc73f89690fd435dae2fcef60 (patch)
tree9f979c084d4ff1ca993a25f498dd6303c584c8b5 /src/gallium/drivers/cell/spu
parentf432ac5a1126997f10072760fe5afbf1b96f44f7 (diff)
cell: Minor changes to make stencil not crash
I'm not sure these are quite correct. The reflect demo doesn't assert anymore, but it doesn't produce correct results either. SPE-based vertex shader code needs to be disabled for relfect to run.
Diffstat (limited to 'src/gallium/drivers/cell/spu')
-rw-r--r--src/gallium/drivers/cell/spu/spu_main.c12
-rw-r--r--src/gallium/drivers/cell/spu/spu_tile.h4
2 files changed, 11 insertions, 5 deletions
diff --git a/src/gallium/drivers/cell/spu/spu_main.c b/src/gallium/drivers/cell/spu/spu_main.c
index b8bb8e9449b..122cf337a68 100644
--- a/src/gallium/drivers/cell/spu/spu_main.c
+++ b/src/gallium/drivers/cell/spu/spu_main.c
@@ -218,12 +218,18 @@ cmd_state_framebuffer(const struct cell_command_framebuffer *cmd)
spu.fb.width_tiles = (spu.fb.width + TILE_SIZE - 1) / TILE_SIZE;
spu.fb.height_tiles = (spu.fb.height + TILE_SIZE - 1) / TILE_SIZE;
- if (spu.fb.depth_format == PIPE_FORMAT_Z32_UNORM)
+ switch (spu.fb.depth_format) {
+ case PIPE_FORMAT_Z32_UNORM:
+ case PIPE_FORMAT_Z24S8_UNORM:
spu.fb.zsize = 4;
- else if (spu.fb.depth_format == PIPE_FORMAT_Z16_UNORM)
+ break;
+ case PIPE_FORMAT_Z16_UNORM:
spu.fb.zsize = 2;
- else
+ break;
+ default:
spu.fb.zsize = 0;
+ break;
+ }
if (spu.fb.color_format == PIPE_FORMAT_A8R8G8B8_UNORM)
spu.color_shuffle = ((vector unsigned char) {
diff --git a/src/gallium/drivers/cell/spu/spu_tile.h b/src/gallium/drivers/cell/spu/spu_tile.h
index 3105b848fdc..1b5491112db 100644
--- a/src/gallium/drivers/cell/spu/spu_tile.h
+++ b/src/gallium/drivers/cell/spu/spu_tile.h
@@ -56,13 +56,13 @@ clear_c_tile(tile_t *ctile)
static INLINE void
clear_z_tile(tile_t *ztile)
{
- if (spu.fb.depth_format == PIPE_FORMAT_Z16_UNORM) {
+ if (spu.fb.zsize == 2) {
memset16((ushort*) ztile->us,
spu.fb.depth_clear_value,
TILE_SIZE * TILE_SIZE);
}
else {
- ASSERT(spu.fb.depth_format == PIPE_FORMAT_Z32_UNORM);
+ ASSERT(spu.fb.zsize != 0);
memset32((uint*) ztile->ui,
spu.fb.depth_clear_value,
TILE_SIZE * TILE_SIZE);