diff options
author | Keith Whitwell <[email protected]> | 2009-10-23 14:31:24 +0100 |
---|---|---|
committer | Keith Whitwell <[email protected]> | 2009-10-23 14:31:24 +0100 |
commit | b9cb74c7f826dfd320f5e5b54aa933898f7ddd3d (patch) | |
tree | bd228f2769b91239bf0d836daa82095fe106bb1d /src/gallium/drivers/cell/ppu | |
parent | 4e1d51786e0657c7430d731ac464f2a73e32eddf (diff) |
gallium: remove the swizzling parts of ExtSwizzle
These haven't been used by the mesa state tracker since the
conversion to tgsi_ureg, and it seems that none of the
other state trackers are using it either.
This helps simplify one of the biggest suprises when starting off with
TGSI shaders.
Diffstat (limited to 'src/gallium/drivers/cell/ppu')
-rw-r--r-- | src/gallium/drivers/cell/ppu/cell_gen_fp.c | 18 |
1 files changed, 4 insertions, 14 deletions
diff --git a/src/gallium/drivers/cell/ppu/cell_gen_fp.c b/src/gallium/drivers/cell/ppu/cell_gen_fp.c index b6b2f885af5..19e3ab08440 100644 --- a/src/gallium/drivers/cell/ppu/cell_gen_fp.c +++ b/src/gallium/drivers/cell/ppu/cell_gen_fp.c @@ -231,7 +231,7 @@ static boolean is_register_src(struct codegen *gen, int channel, const struct tgsi_full_src_register *src) { - int swizzle = tgsi_util_get_full_src_register_extswizzle(src, channel); + int swizzle = tgsi_util_get_full_src_register_swizzle(src, channel); int sign_op = tgsi_util_get_full_src_register_sign_mode(src, channel); if (swizzle > TGSI_SWIZZLE_W || sign_op != TGSI_UTIL_SIGN_KEEP) { @@ -271,23 +271,14 @@ get_src_reg(struct codegen *gen, const struct tgsi_full_src_register *src) { int reg = -1; - int swizzle = tgsi_util_get_full_src_register_extswizzle(src, channel); + int swizzle = tgsi_util_get_full_src_register_swizzle(src, channel); boolean reg_is_itemp = FALSE; uint sign_op; assert(swizzle >= TGSI_SWIZZLE_X); - assert(swizzle <= TGSI_EXTSWIZZLE_ONE); + assert(swizzle <= TGSI_SWIZZLE_W); - if (swizzle == TGSI_EXTSWIZZLE_ONE) { - /* Load const one float and early out */ - reg = get_const_one_reg(gen); - } - else if (swizzle == TGSI_EXTSWIZZLE_ZERO) { - /* Load const zero float and early out */ - reg = get_itemp(gen); - spe_xor(gen->f, reg, reg, reg); - } - else { + { int index = src->SrcRegister.Index; assert(swizzle < 4); @@ -1758,7 +1749,6 @@ emit_instruction(struct codegen *gen, case TGSI_OPCODE_ARL: return emit_ARL(gen, inst); case TGSI_OPCODE_MOV: - case TGSI_OPCODE_SWZ: return emit_MOV(gen, inst); case TGSI_OPCODE_ADD: case TGSI_OPCODE_SUB: |