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authorChristian Gmeiner <[email protected]>2018-06-15 12:29:58 +0200
committerChristian Gmeiner <[email protected]>2018-06-20 17:55:39 +0200
commitf485e5671c97468fc445da45a9ecc9d9c7dd8243 (patch)
tree60033a3d1612106c8589c27c2240664cb6c00ae2 /src/gallium/docs
parent050d8a4b42d3c9d07abf60124ff3a39eb22e5b01 (diff)
gallium: add scalar isa shader cap
v1 -> v2: - nv30 is _NOT_ scalar as suggested by Ilia Mirkin. - Change from a screen cap to a shader cap as suggested by Eric Anholt. - radeonsi is scalar as suggested by Marek Olšák. - Change missing ones to be scalar. v2 -> v3: - r600 prefers vec4 as suggested by Marek Olšák. Signed-off-by: Christian Gmeiner <[email protected]> Reviewed-by: Eric Anholt <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
Diffstat (limited to 'src/gallium/docs')
-rw-r--r--src/gallium/docs/source/screen.rst1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/gallium/docs/source/screen.rst b/src/gallium/docs/source/screen.rst
index a41c421ec47..d7ce521c2c3 100644
--- a/src/gallium/docs/source/screen.rst
+++ b/src/gallium/docs/source/screen.rst
@@ -549,6 +549,7 @@ MOV OUT[0], CONST[0][3] # copy vector 3 of constbuf 0
how many HW counters are available for this stage. (0 uses SSBO atomics).
* ``PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTER_BUFFERS``: If atomic counters are
separate, how many atomic counter buffers are available for this stage.
+* ``PIPE_SHADER_CAP_SCALAR_ISA``: Whether the ISA is a scalar one.
.. _pipe_compute_cap: