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authorMarek Olšák <[email protected]>2014-08-06 23:58:10 +0200
committerMarek Olšák <[email protected]>2014-08-11 21:53:57 +0200
commitc10332bbb8889d733bdaa729ef23cbd90176b55d (patch)
tree3ffd8ddb9bcc10daae13c081c5e8bbc5ac052150 /src/gallium/docs/source
parent718d4b97efc5792c09b824c909d1ec2998738c02 (diff)
gallium: remove PIPE_SHADER_CAP_MAX_ADDRS
This limit is fixed in Mesa core and cannot be changed. It only affects ARB_vertex_program and ARB_fragment_program. The minimum value for ARB_vertex_program is 1 according to the spec. The maximum value for ARB_vertex_program is limited to 1 by Mesa core. The value should be zero for ARB_fragment_program, because it doesn't support ARL. Finally, drivers shouldn't mess with these values arbitrarily. Reviewed-by: Ilia Mirkin <[email protected]>
Diffstat (limited to 'src/gallium/docs/source')
-rw-r--r--src/gallium/docs/source/screen.rst1
1 files changed, 0 insertions, 1 deletions
diff --git a/src/gallium/docs/source/screen.rst b/src/gallium/docs/source/screen.rst
index 74cecc23b0e..814e3aec69b 100644
--- a/src/gallium/docs/source/screen.rst
+++ b/src/gallium/docs/source/screen.rst
@@ -269,7 +269,6 @@ file is still supported. In that case, the constbuf index is assumed
to be 0.
* ``PIPE_SHADER_CAP_MAX_TEMPS``: The maximum number of temporary registers.
-* ``PIPE_SHADER_CAP_MAX_ADDRS``: The maximum number of address registers.
* ``PIPE_SHADER_CAP_MAX_PREDS``: The maximum number of predicate registers.
* ``PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED``: Whether the continue opcode is supported.
* ``PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR``: Whether indirect addressing