diff options
author | Marek Olšák <[email protected]> | 2017-08-19 21:09:52 +0200 |
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committer | Marek Olšák <[email protected]> | 2017-08-22 13:29:47 +0200 |
commit | 068c3ad2cbef748783837ebbaa6cdca325d0475e (patch) | |
tree | 202fb6f08553e26fe4cee0bf7a61927673c897a5 /src/gallium/docs/source/tgsi.rst | |
parent | 44716655e6e62ebb09941a763e774148e151574f (diff) |
gallium: remove TGSI FENCE opcodes
use MEMBAR instead
Reviewed-by: Roland Scheidegger <[email protected]>
Diffstat (limited to 'src/gallium/docs/source/tgsi.rst')
-rw-r--r-- | src/gallium/docs/source/tgsi.rst | 30 |
1 files changed, 0 insertions, 30 deletions
diff --git a/src/gallium/docs/source/tgsi.rst b/src/gallium/docs/source/tgsi.rst index 83ef7853949..be1f411b91a 100644 --- a/src/gallium/docs/source/tgsi.rst +++ b/src/gallium/docs/source/tgsi.rst @@ -2635,36 +2635,6 @@ These opcodes are intended for communication between threads running within the same compute grid. For now they're only valid in compute programs. -.. opcode:: MFENCE - Memory fence - - Syntax: ``MFENCE resource`` - - Example: ``MFENCE RES[0]`` - - This opcode forces strong ordering between any memory access - operations that affect the specified resource. This means that - previous loads and stores (and only those) will be performed and - visible to other threads before the program execution continues. - - -.. opcode:: LFENCE - Load memory fence - - Syntax: ``LFENCE resource`` - - Example: ``LFENCE RES[0]`` - - Similar to MFENCE, but it only affects the ordering of memory loads. - - -.. opcode:: SFENCE - Store memory fence - - Syntax: ``SFENCE resource`` - - Example: ``SFENCE RES[0]`` - - Similar to MFENCE, but it only affects the ordering of memory stores. - - .. opcode:: BARRIER - Thread group barrier ``BARRIER`` |