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author | Lyude <[email protected]> | 2017-03-16 18:00:05 -0400 |
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committer | Ilia Mirkin <[email protected]> | 2017-03-31 21:41:24 -0400 |
commit | ffe2bd676f332172a5faa053eff6460c1f184ef5 (patch) | |
tree | 6f653bf858e92738b89c34f5c9d222a04acbe5fb /src/gallium/docs/source/screen.rst | |
parent | 54af467334db53837171701471fb7854ccdf8dd5 (diff) |
gallium: Add a cap to check if the driver supports fill_rectangle
Changes since v1:
- Add pipe caps for etnaviv, freedreno, swr and virgl
Signed-off-by: Lyude <[email protected]>
Reviewed-by: Ilia Mirkin <[email protected]>
Diffstat (limited to 'src/gallium/docs/source/screen.rst')
-rw-r--r-- | src/gallium/docs/source/screen.rst | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/src/gallium/docs/source/screen.rst b/src/gallium/docs/source/screen.rst index 28be39fc33f..da513ccd11d 100644 --- a/src/gallium/docs/source/screen.rst +++ b/src/gallium/docs/source/screen.rst @@ -377,6 +377,10 @@ The integer capabilities: * ``PIPE_CAP_TGSI_TEX_TXF_LZ``: Whether TEX_LZ and TXF_LZ opcodes are supported. * ``PIPE_CAP_TGSI_CLOCK``: Whether the CLOCK opcode is supported. +* ``PIPE_CAP_POLYGON_MODE_FILL_RECTANGLE``: Whether the + PIPE_POLYGON_MODE_FILL_RECTANGLE mode is supported for + ``pipe_rasterizer_state::fill_front`` and + ``pipe_rasterizer_state::fill_back``. .. _pipe_capf: |