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authorChia-I Wu <[email protected]>2010-08-10 00:39:23 +0800
committerChia-I Wu <[email protected]>2010-08-16 20:46:29 +0800
commit7b3beb22405ee2de0cf02951b6547964a2989ee5 (patch)
treeb3b6025c61591ed7e25682ea033b2ead289051db /src/gallium/auxiliary
parenta97419a3ba86fd112a22b5786c4f34f8d8a54f2d (diff)
draw: last_vertex_last is always true for GS and SO.
That is, OpenGL decomposition rule is assumed. There should be a pipe_context state to specify the rules.
Diffstat (limited to 'src/gallium/auxiliary')
-rw-r--r--src/gallium/auxiliary/draw/draw_gs_tmp.h7
-rw-r--r--src/gallium/auxiliary/draw/draw_so_emit_tmp.h5
2 files changed, 3 insertions, 9 deletions
diff --git a/src/gallium/auxiliary/draw/draw_gs_tmp.h b/src/gallium/auxiliary/draw/draw_gs_tmp.h
index 7c8a9f9cfcc..de7b02655a5 100644
--- a/src/gallium/auxiliary/draw/draw_gs_tmp.h
+++ b/src/gallium/auxiliary/draw/draw_gs_tmp.h
@@ -6,13 +6,10 @@
#define FUNC_ENTER \
/* declare more local vars */ \
- struct draw_context *draw = gs->draw; \
const unsigned prim = input_prims->prim; \
- const unsigned count = input_prims->count; \
- const boolean last_vertex_last = \
- !(draw->rasterizer->flatshade && \
- draw->rasterizer->flatshade_first); \
const unsigned prim_flags = input_prims->flags; \
+ const unsigned count = input_prims->count; \
+ const boolean last_vertex_last = TRUE; \
do { \
debug_assert(input_prims->primitive_count == 1); \
switch (prim) { \
diff --git a/src/gallium/auxiliary/draw/draw_so_emit_tmp.h b/src/gallium/auxiliary/draw/draw_so_emit_tmp.h
index 1446e81bba7..7fafde9d5e6 100644
--- a/src/gallium/auxiliary/draw/draw_so_emit_tmp.h
+++ b/src/gallium/auxiliary/draw/draw_so_emit_tmp.h
@@ -7,12 +7,9 @@
#define FUNC_ENTER \
/* declare more local vars */ \
- struct draw_context *draw = so->draw; \
const unsigned prim = input_prims->prim; \
- const boolean last_vertex_last = \
- !(draw->rasterizer->flatshade && \
- draw->rasterizer->flatshade_first); \
const unsigned prim_flags = input_prims->flags; \
+ const boolean last_vertex_last = TRUE; \
do { \
debug_assert(input_prims->primitive_count == 1); \
switch (prim) { \