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authorEric Anholt <[email protected]>2014-11-12 13:13:59 -0800
committerEric Anholt <[email protected]>2014-11-24 14:56:22 -0800
commitd4864cdf15ccd30f0e82d07fd0e9db8a0c115cda (patch)
treefddfda125d068bb4b451ca411fe9fc6b130a9d62 /src/gallium/auxiliary
parent7361d5ba63dda35683569e76caa33f886304958f (diff)
gallium: Drop the NRM and NRM4 opcodes.
They weren't generated in tree, and as far as I know all hardware had to lower it to a DP, RSQ, MUL. Reviewed-by: Jose Fonseca <[email protected]>
Diffstat (limited to 'src/gallium/auxiliary')
-rw-r--r--src/gallium/auxiliary/gallivm/lp_bld_tgsi_aos.c5
-rw-r--r--src/gallium/auxiliary/gallivm/lp_bld_tgsi_soa.c95
-rw-r--r--src/gallium/auxiliary/tgsi/tgsi_exec.c72
-rw-r--r--src/gallium/auxiliary/tgsi/tgsi_info.c4
-rw-r--r--src/gallium/auxiliary/tgsi/tgsi_opcode_tmp.h2
5 files changed, 2 insertions, 176 deletions
diff --git a/src/gallium/auxiliary/gallivm/lp_bld_tgsi_aos.c b/src/gallium/auxiliary/gallivm/lp_bld_tgsi_aos.c
index f2fc7b0e6e7..7829a7e9c54 100644
--- a/src/gallium/auxiliary/gallivm/lp_bld_tgsi_aos.c
+++ b/src/gallium/auxiliary/gallivm/lp_bld_tgsi_aos.c
@@ -852,11 +852,6 @@ lp_emit_instruction_aos(
dst0 = emit_tex(bld, inst, LP_BLD_TEX_MODIFIER_LOD_BIAS);
break;
- case TGSI_OPCODE_NRM:
- /* fall-through */
- case TGSI_OPCODE_NRM4:
- return FALSE;
-
case TGSI_OPCODE_DIV:
assert(0);
return FALSE;
diff --git a/src/gallium/auxiliary/gallivm/lp_bld_tgsi_soa.c b/src/gallium/auxiliary/gallivm/lp_bld_tgsi_soa.c
index 05618bc1e6e..76b9d69264f 100644
--- a/src/gallium/auxiliary/gallivm/lp_bld_tgsi_soa.c
+++ b/src/gallium/auxiliary/gallivm/lp_bld_tgsi_soa.c
@@ -3507,99 +3507,6 @@ cont_emit(
lp_exec_continue(&bld->exec_mask);
}
-/* XXX: Refactor and move it to lp_bld_tgsi_action.c
- *
- * XXX: What do the comments about xmm registers mean? Maybe they are left over
- * from old code, but there is no garauntee that LLVM will use those registers
- * for this code.
- *
- * XXX: There should be no calls to lp_build_emit_fetch in this function. This
- * should be handled by the emit_data->fetch_args function. */
-static void
-nrm_emit(
- const struct lp_build_tgsi_action * action,
- struct lp_build_tgsi_context * bld_base,
- struct lp_build_emit_data * emit_data)
-{
- LLVMValueRef tmp0, tmp1;
- LLVMValueRef tmp4 = NULL;
- LLVMValueRef tmp5 = NULL;
- LLVMValueRef tmp6 = NULL;
- LLVMValueRef tmp7 = NULL;
- struct lp_build_tgsi_soa_context * bld = lp_soa_context(bld_base);
-
- uint dims = (emit_data->inst->Instruction.Opcode == TGSI_OPCODE_NRM) ? 3 : 4;
-
- if (TGSI_IS_DST0_CHANNEL_ENABLED(emit_data->inst, TGSI_CHAN_X) ||
- TGSI_IS_DST0_CHANNEL_ENABLED(emit_data->inst, TGSI_CHAN_Y) ||
- TGSI_IS_DST0_CHANNEL_ENABLED(emit_data->inst, TGSI_CHAN_Z) ||
- (TGSI_IS_DST0_CHANNEL_ENABLED(emit_data->inst, TGSI_CHAN_W) && dims == 4)) {
-
- /* NOTE: Cannot use xmm regs 2/3 here (see emit_rsqrt() above). */
-
- /* xmm4 = src.x */
- /* xmm0 = src.x * src.x */
- tmp0 = lp_build_emit_fetch(&bld->bld_base, emit_data->inst, 0, TGSI_CHAN_X);
- if (TGSI_IS_DST0_CHANNEL_ENABLED(emit_data->inst, TGSI_CHAN_X)) {
- tmp4 = tmp0;
- }
- tmp0 = lp_build_mul( &bld->bld_base.base, tmp0, tmp0);
-
- /* xmm5 = src.y */
- /* xmm0 = xmm0 + src.y * src.y */
- tmp1 = lp_build_emit_fetch(&bld->bld_base, emit_data->inst, 0, TGSI_CHAN_Y);
- if (TGSI_IS_DST0_CHANNEL_ENABLED(emit_data->inst, TGSI_CHAN_Y)) {
- tmp5 = tmp1;
- }
- tmp1 = lp_build_mul( &bld->bld_base.base, tmp1, tmp1);
- tmp0 = lp_build_add( &bld->bld_base.base, tmp0, tmp1);
-
- /* xmm6 = src.z */
- /* xmm0 = xmm0 + src.z * src.z */
- tmp1 = lp_build_emit_fetch(&bld->bld_base, emit_data->inst, 0, TGSI_CHAN_Z);
- if (TGSI_IS_DST0_CHANNEL_ENABLED(emit_data->inst, TGSI_CHAN_Z)) {
- tmp6 = tmp1;
- }
- tmp1 = lp_build_mul( &bld->bld_base.base, tmp1, tmp1);
- tmp0 = lp_build_add( &bld->bld_base.base, tmp0, tmp1);
-
- if (dims == 4) {
- /* xmm7 = src.w */
- /* xmm0 = xmm0 + src.w * src.w */
- tmp1 = lp_build_emit_fetch(&bld->bld_base, emit_data->inst, 0, TGSI_CHAN_W);
- if (TGSI_IS_DST0_CHANNEL_ENABLED(emit_data->inst, TGSI_CHAN_W)) {
- tmp7 = tmp1;
- }
- tmp1 = lp_build_mul( &bld->bld_base.base, tmp1, tmp1);
- tmp0 = lp_build_add( &bld->bld_base.base, tmp0, tmp1);
- }
- /* xmm1 = 1 / sqrt(xmm0) */
- tmp1 = lp_build_rsqrt( &bld->bld_base.base, tmp0);
- /* dst.x = xmm1 * src.x */
- if (TGSI_IS_DST0_CHANNEL_ENABLED(emit_data->inst, TGSI_CHAN_X)) {
- emit_data->output[TGSI_CHAN_X] = lp_build_mul( &bld->bld_base.base, tmp4, tmp1);
- }
- /* dst.y = xmm1 * src.y */
- if (TGSI_IS_DST0_CHANNEL_ENABLED(emit_data->inst, TGSI_CHAN_Y)) {
- emit_data->output[TGSI_CHAN_Y] = lp_build_mul( &bld->bld_base.base, tmp5, tmp1);
- }
-
- /* dst.z = xmm1 * src.z */
- if (TGSI_IS_DST0_CHANNEL_ENABLED(emit_data->inst, TGSI_CHAN_Z)) {
- emit_data->output[TGSI_CHAN_Z] = lp_build_mul( &bld->bld_base.base, tmp6, tmp1);
- }
- /* dst.w = xmm1 * src.w */
- if (TGSI_IS_DST0_CHANNEL_ENABLED(emit_data->inst, TGSI_CHAN_X) && dims == 4) {
- emit_data->output[TGSI_CHAN_W] = lp_build_mul( &bld->bld_base.base, tmp7, tmp1);
- }
- }
-
- /* dst.w = 1.0 */
- if (TGSI_IS_DST0_CHANNEL_ENABLED(emit_data->inst, TGSI_CHAN_W) && dims == 3) {
- emit_data->output[TGSI_CHAN_W] = bld->bld_base.base.one;
- }
-}
-
static void emit_prologue(struct lp_build_tgsi_context * bld_base)
{
struct lp_build_tgsi_soa_context * bld = lp_soa_context(bld_base);
@@ -3825,8 +3732,6 @@ lp_build_tgsi_soa(struct gallivm_state *gallivm,
bld.bld_base.op_actions[TGSI_OPCODE_UIF].emit = uif_emit;
bld.bld_base.op_actions[TGSI_OPCODE_KILL_IF].emit = kill_if_emit;
bld.bld_base.op_actions[TGSI_OPCODE_KILL].emit = kill_emit;
- bld.bld_base.op_actions[TGSI_OPCODE_NRM].emit = nrm_emit;
- bld.bld_base.op_actions[TGSI_OPCODE_NRM4].emit = nrm_emit;
bld.bld_base.op_actions[TGSI_OPCODE_RET].emit = ret_emit;
bld.bld_base.op_actions[TGSI_OPCODE_SWITCH].emit = switch_emit;
bld.bld_base.op_actions[TGSI_OPCODE_TEX].emit = tex_emit;
diff --git a/src/gallium/auxiliary/tgsi/tgsi_exec.c b/src/gallium/auxiliary/tgsi/tgsi_exec.c
index 77948011ac7..b9a4c7bf88c 100644
--- a/src/gallium/auxiliary/tgsi/tgsi_exec.c
+++ b/src/gallium/auxiliary/tgsi/tgsi_exec.c
@@ -2773,70 +2773,6 @@ exec_dp2(struct tgsi_exec_machine *mach,
}
static void
-exec_nrm4(struct tgsi_exec_machine *mach,
- const struct tgsi_full_instruction *inst)
-{
- unsigned int chan;
- union tgsi_exec_channel arg[4];
- union tgsi_exec_channel scale;
-
- fetch_source(mach, &arg[0], &inst->Src[0], TGSI_CHAN_X, TGSI_EXEC_DATA_FLOAT);
- micro_mul(&scale, &arg[0], &arg[0]);
-
- for (chan = TGSI_CHAN_Y; chan <= TGSI_CHAN_W; chan++) {
- union tgsi_exec_channel product;
-
- fetch_source(mach, &arg[chan], &inst->Src[0], chan, TGSI_EXEC_DATA_FLOAT);
- micro_mul(&product, &arg[chan], &arg[chan]);
- micro_add(&scale, &scale, &product);
- }
-
- micro_rsq(&scale, &scale);
-
- for (chan = TGSI_CHAN_X; chan <= TGSI_CHAN_W; chan++) {
- if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
- micro_mul(&arg[chan], &arg[chan], &scale);
- store_dest(mach, &arg[chan], &inst->Dst[0], inst, chan, TGSI_EXEC_DATA_FLOAT);
- }
- }
-}
-
-static void
-exec_nrm3(struct tgsi_exec_machine *mach,
- const struct tgsi_full_instruction *inst)
-{
- if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_XYZ) {
- unsigned int chan;
- union tgsi_exec_channel arg[3];
- union tgsi_exec_channel scale;
-
- fetch_source(mach, &arg[0], &inst->Src[0], TGSI_CHAN_X, TGSI_EXEC_DATA_FLOAT);
- micro_mul(&scale, &arg[0], &arg[0]);
-
- for (chan = TGSI_CHAN_Y; chan <= TGSI_CHAN_Z; chan++) {
- union tgsi_exec_channel product;
-
- fetch_source(mach, &arg[chan], &inst->Src[0], chan, TGSI_EXEC_DATA_FLOAT);
- micro_mul(&product, &arg[chan], &arg[chan]);
- micro_add(&scale, &scale, &product);
- }
-
- micro_rsq(&scale, &scale);
-
- for (chan = TGSI_CHAN_X; chan <= TGSI_CHAN_Z; chan++) {
- if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
- micro_mul(&arg[chan], &arg[chan], &scale);
- store_dest(mach, &arg[chan], &inst->Dst[0], inst, chan, TGSI_EXEC_DATA_FLOAT);
- }
- }
- }
-
- if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_W) {
- store_dest(mach, &OneVec, &inst->Dst[0], inst, TGSI_CHAN_W, TGSI_EXEC_DATA_FLOAT);
- }
-}
-
-static void
exec_scs(struct tgsi_exec_machine *mach,
const struct tgsi_full_instruction *inst)
{
@@ -4104,14 +4040,6 @@ exec_instruction(
exec_scs(mach, inst);
break;
- case TGSI_OPCODE_NRM:
- exec_nrm3(mach, inst);
- break;
-
- case TGSI_OPCODE_NRM4:
- exec_nrm4(mach, inst);
- break;
-
case TGSI_OPCODE_DIV:
exec_vector_binary(mach, inst, micro_div, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT);
break;
diff --git a/src/gallium/auxiliary/tgsi/tgsi_info.c b/src/gallium/auxiliary/tgsi/tgsi_info.c
index 74d186cfdf1..6336304d594 100644
--- a/src/gallium/auxiliary/tgsi/tgsi_info.c
+++ b/src/gallium/auxiliary/tgsi/tgsi_info.c
@@ -106,7 +106,7 @@ static const struct tgsi_opcode_info opcode_info[TGSI_OPCODE_LAST] =
{ 1, 3, 0, 0, 0, 0, COMP, "CMP", TGSI_OPCODE_CMP },
{ 1, 1, 0, 0, 0, 0, CHAN, "SCS", TGSI_OPCODE_SCS },
{ 1, 2, 1, 0, 0, 0, OTHR, "TXB", TGSI_OPCODE_TXB },
- { 1, 1, 0, 0, 0, 0, COMP, "NRM", TGSI_OPCODE_NRM },
+ { 0, 1, 0, 0, 0, 1, NONE, "", 69 }, /* removed */
{ 1, 2, 0, 0, 0, 0, COMP, "DIV", TGSI_OPCODE_DIV },
{ 1, 2, 0, 0, 0, 0, REPL, "DP2", TGSI_OPCODE_DP2 },
{ 1, 2, 1, 0, 0, 0, OTHR, "TXL", TGSI_OPCODE_TXL },
@@ -149,7 +149,7 @@ static const struct tgsi_opcode_info opcode_info[TGSI_OPCODE_LAST] =
{ 1, 2, 0, 0, 0, 0, COMP, "FSGE", TGSI_OPCODE_FSGE },
{ 1, 2, 0, 0, 0, 0, COMP, "FSLT", TGSI_OPCODE_FSLT },
{ 1, 2, 0, 0, 0, 0, COMP, "FSNE", TGSI_OPCODE_FSNE },
- { 1, 1, 0, 0, 0, 0, REPL, "NRM4", TGSI_OPCODE_NRM4 },
+ { 0, 1, 0, 0, 0, 1, NONE, "", 112 }, /* removed */
{ 0, 1, 0, 0, 0, 0, NONE, "CALLNZ", TGSI_OPCODE_CALLNZ },
{ 0, 1, 0, 0, 0, 0, NONE, "", 114 }, /* removed */
{ 0, 1, 0, 0, 0, 0, NONE, "BREAKC", TGSI_OPCODE_BREAKC },
diff --git a/src/gallium/auxiliary/tgsi/tgsi_opcode_tmp.h b/src/gallium/auxiliary/tgsi/tgsi_opcode_tmp.h
index 4ca4f246e26..56a7a972c92 100644
--- a/src/gallium/auxiliary/tgsi/tgsi_opcode_tmp.h
+++ b/src/gallium/auxiliary/tgsi/tgsi_opcode_tmp.h
@@ -122,7 +122,6 @@ OP11(SSG)
OP13(CMP)
OP11(SCS)
OP12_TEX(TXB)
-OP11(NRM)
OP12(DIV)
OP12(DP2)
OP12_TEX(TXL)
@@ -153,7 +152,6 @@ OP00(BGNSUB)
OP00_LBL(ENDLOOP)
OP00(ENDSUB)
OP00(NOP)
-OP11(NRM4)
OP01(CALLNZ)
OP01(BREAKC)
OP01(KILL_IF)