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authorBrian Paul <[email protected]>2010-07-21 09:17:47 -0600
committerBrian Paul <[email protected]>2010-07-21 10:16:32 -0600
commit890976e02d9b75c0814493901ffddb64092ea548 (patch)
tree355989e068395ce6ab7e1e26d350811b25c2c06a /src/gallium/auxiliary
parentbe22e1e781094decfb408ad6d74e3d833b297c87 (diff)
gallivm: added comment
Diffstat (limited to 'src/gallium/auxiliary')
-rw-r--r--src/gallium/auxiliary/gallivm/lp_bld_tgsi_soa.c6
1 files changed, 6 insertions, 0 deletions
diff --git a/src/gallium/auxiliary/gallivm/lp_bld_tgsi_soa.c b/src/gallium/auxiliary/gallivm/lp_bld_tgsi_soa.c
index 670c9747c0a..05f63526ee5 100644
--- a/src/gallium/auxiliary/gallivm/lp_bld_tgsi_soa.c
+++ b/src/gallium/auxiliary/gallivm/lp_bld_tgsi_soa.c
@@ -481,6 +481,12 @@ emit_fetch(
}
if (reg->Register.Indirect) {
+ /*
+ * Compute addr_vec: a vector of offsets into the register file
+ * from which we need to gather elements. Recall that the ADDR
+ * register's elements can all be different.
+ */
+
LLVMTypeRef int_vec_type = lp_build_int_vec_type(bld->base.type);
unsigned swizzle = tgsi_util_get_src_register_swizzle( &reg->Indirect, chan_index );