diff options
| author | Nicolai Hähnle <[email protected]> | 2017-01-16 16:40:41 +0100 |
|---|---|---|
| committer | Nicolai Hähnle <[email protected]> | 2017-01-16 20:17:22 +0100 |
| commit | 6be4a404300e4896ef531a10e24c6b76698afe1a (patch) | |
| tree | 0a46e8ad9e353a9441bd04287afdfbcbbf66afbf /src/gallium/auxiliary | |
| parent | 5e94e5bb9bc30b575fdd3347bab7f170fb736e83 (diff) | |
tgsi: add DDIV instruction
Double-precision division, to allow more precision than a DRCP + DMUL
sequence.
Reviewed-by: Roland Scheidegger <[email protected]>
Reviewed-by: Ilia Mirkin <[email protected]>
Reviewed-by: Marek Olšák <[email protected]>
Diffstat (limited to 'src/gallium/auxiliary')
| -rw-r--r-- | src/gallium/auxiliary/gallivm/lp_bld_tgsi_action.c | 2 | ||||
| -rw-r--r-- | src/gallium/auxiliary/tgsi/tgsi_info.c | 2 |
2 files changed, 4 insertions, 0 deletions
diff --git a/src/gallium/auxiliary/gallivm/lp_bld_tgsi_action.c b/src/gallium/auxiliary/gallivm/lp_bld_tgsi_action.c index 91e959f3451..937170fec1f 100644 --- a/src/gallium/auxiliary/gallivm/lp_bld_tgsi_action.c +++ b/src/gallium/auxiliary/gallivm/lp_bld_tgsi_action.c @@ -1355,6 +1355,7 @@ lp_set_default_actions(struct lp_build_tgsi_context * bld_base) bld_base->op_actions[TGSI_OPCODE_DMAX].emit = fmax_emit; bld_base->op_actions[TGSI_OPCODE_DMIN].emit = fmin_emit; bld_base->op_actions[TGSI_OPCODE_DMUL].emit = mul_emit; + bld_base->op_actions[TGSI_OPCODE_DDIV].emit = fdiv_emit; bld_base->op_actions[TGSI_OPCODE_D2F].emit = d2f_emit; bld_base->op_actions[TGSI_OPCODE_D2I].emit = d2i_emit; @@ -2623,6 +2624,7 @@ lp_set_default_actions_cpu( bld_base->op_actions[TGSI_OPCODE_DSLT].emit = dslt_emit_cpu; bld_base->op_actions[TGSI_OPCODE_DSNE].emit = dsne_emit_cpu; + bld_base->op_actions[TGSI_OPCODE_DDIV].emit = div_emit_cpu; bld_base->op_actions[TGSI_OPCODE_DRSQ].emit = drecip_sqrt_emit_cpu; bld_base->op_actions[TGSI_OPCODE_DSQRT].emit = dsqrt_emit_cpu; diff --git a/src/gallium/auxiliary/tgsi/tgsi_info.c b/src/gallium/auxiliary/tgsi/tgsi_info.c index a339ec281c7..3bec56119b8 100644 --- a/src/gallium/auxiliary/tgsi/tgsi_info.c +++ b/src/gallium/auxiliary/tgsi/tgsi_info.c @@ -287,6 +287,7 @@ static const struct tgsi_opcode_info opcode_info[TGSI_OPCODE_LAST] = { 1, 2, 0, 0, 0, 0, 0, COMP, "U64DIV", TGSI_OPCODE_U64DIV }, { 1, 2, 0, 0, 0, 0, 0, COMP, "I64MOD", TGSI_OPCODE_I64MOD }, { 1, 2, 0, 0, 0, 0, 0, COMP, "U64MOD", TGSI_OPCODE_U64MOD }, + { 1, 2, 0, 0, 0, 0, 0, COMP, "DDIV", TGSI_OPCODE_DDIV }, }; const struct tgsi_opcode_info * @@ -417,6 +418,7 @@ tgsi_opcode_infer_type( uint opcode ) case TGSI_OPCODE_DNEG: case TGSI_OPCODE_DMUL: case TGSI_OPCODE_DMAX: + case TGSI_OPCODE_DDIV: case TGSI_OPCODE_DMIN: case TGSI_OPCODE_DRCP: case TGSI_OPCODE_DSQRT: |