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authorRoland Scheidegger <[email protected]>2014-09-19 16:56:04 +0200
committerRoland Scheidegger <[email protected]>2014-09-19 16:58:28 +0200
commitf2c39dd0e19e83dac922878b00a4b871c839b609 (patch)
treea8c567e7d27718c5bcb4d6e1f0c83874c104b46a /src/gallium/auxiliary/util
parent74d7ff2efda8e33e097ed6e3f9853fc1c8d45618 (diff)
util: don't try to emit half-float intrinsics if avx isn't available
These instructions only have vex encodings, thus they can't be used without avx. (Technically, one can still use avx-128 if avx isn't available because the environment doesn't store the ymm registers, however I don't think llvm can.) Reviewed-by: Jose Fonseca <[email protected]>
Diffstat (limited to 'src/gallium/auxiliary/util')
-rw-r--r--src/gallium/auxiliary/util/u_cpu_detect.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/gallium/auxiliary/util/u_cpu_detect.c b/src/gallium/auxiliary/util/u_cpu_detect.c
index d2d1313f8e9..5d9db59d16b 100644
--- a/src/gallium/auxiliary/util/u_cpu_detect.c
+++ b/src/gallium/auxiliary/util/u_cpu_detect.c
@@ -369,7 +369,7 @@ util_cpu_detect(void)
util_cpu_caps.has_avx = ((regs2[2] >> 28) & 1) && // AVX
((regs2[2] >> 27) & 1) && // OSXSAVE
((xgetbv() & 6) == 6); // XMM & YMM
- util_cpu_caps.has_f16c = (regs2[2] >> 29) & 1;
+ util_cpu_caps.has_f16c = ((regs2[2] >> 29) & 1) && util_cpu_caps.has_avx;
util_cpu_caps.has_mmx2 = util_cpu_caps.has_sse; /* SSE cpus supports mmxext too */
#if defined(PIPE_ARCH_X86_64)
util_cpu_caps.has_daz = 1;