diff options
| author | Tim Rowley <[email protected]> | 2017-10-19 09:13:46 -0500 |
|---|---|---|
| committer | Tim Rowley <[email protected]> | 2017-10-19 12:49:32 -0500 |
| commit | 33bdbc1db47cffc9c8b79d7daee51fcdcb52837e (patch) | |
| tree | ac5070057a3a1bf44762c887a19277ae4e805995 /src/gallium/auxiliary/tgsi | |
| parent | 113a6a639fec88631411d4a53d8e68cdebe15865 (diff) | |
gallium: add more exceptions to tgsi_util_get_inst_usage_mask
A number of double/int64 operations don't have matching
read and write usage masks, which the fallthrough case of
tgsi_util_get_inst_usage_mask assumes for componentwise
tagged instructions.
No regressions in llvmpipe piglit; fixes a large number of
swr regressions.
Reviewed-by: Roland Scheidegger <[email protected]>
Reviewed-by: Marek Olšák <[email protected]>
Diffstat (limited to 'src/gallium/auxiliary/tgsi')
| -rw-r--r-- | src/gallium/auxiliary/tgsi/tgsi_util.c | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/src/gallium/auxiliary/tgsi/tgsi_util.c b/src/gallium/auxiliary/tgsi/tgsi_util.c index cfce59093c2..afe5690ce09 100644 --- a/src/gallium/auxiliary/tgsi/tgsi_util.c +++ b/src/gallium/auxiliary/tgsi/tgsi_util.c @@ -230,13 +230,25 @@ tgsi_util_get_inst_usage_mask(const struct tgsi_full_instruction *inst, read_mask = TGSI_WRITEMASK_XYZ; break; + case TGSI_OPCODE_DSEQ: + case TGSI_OPCODE_DSNE: + case TGSI_OPCODE_DSLT: + case TGSI_OPCODE_DSGE: case TGSI_OPCODE_DP4: case TGSI_OPCODE_PK4B: case TGSI_OPCODE_PK4UB: case TGSI_OPCODE_D2F: + case TGSI_OPCODE_D2I: + case TGSI_OPCODE_D2U: case TGSI_OPCODE_I2F: case TGSI_OPCODE_U2F: + case TGSI_OPCODE_U64SEQ: + case TGSI_OPCODE_U64SNE: + case TGSI_OPCODE_U64SLT: + case TGSI_OPCODE_U64SGE: case TGSI_OPCODE_U642F: + case TGSI_OPCODE_I64SLT: + case TGSI_OPCODE_I64SGE: case TGSI_OPCODE_I642F: read_mask = TGSI_WRITEMASK_XYZW; break; |