diff options
author | Michal Krol <[email protected]> | 2009-07-31 18:12:53 +0200 |
---|---|---|
committer | Michal Krol <[email protected]> | 2009-07-31 18:14:40 +0200 |
commit | cb90c43676c258419e4b617c908570891d3674cb (patch) | |
tree | bb4c581e9f4969bfc4c7ac163e0b8f1eee845846 /src/gallium/auxiliary/tgsi | |
parent | dc516d6e2afe7f157dbe5aad1288e5624b27e093 (diff) |
Rename TGSI LOOP instruction to better match theri usage.
The LOOP/ENDLOOP pair is renamed to BGNFOR/ENDFOR as its behaviour
is similar to a C language for-loop.
The BGNLOOP2/ENDLOOP2 pair is renamed to BGNLOOP/ENDLOOP as now
there is no name collision.
Diffstat (limited to 'src/gallium/auxiliary/tgsi')
-rw-r--r-- | src/gallium/auxiliary/tgsi/tgsi-instruction-set.txt | 12 | ||||
-rw-r--r-- | src/gallium/auxiliary/tgsi/tgsi_dump.c | 4 | ||||
-rw-r--r-- | src/gallium/auxiliary/tgsi/tgsi_exec.c | 8 | ||||
-rw-r--r-- | src/gallium/auxiliary/tgsi/tgsi_info.c | 8 | ||||
-rw-r--r-- | src/gallium/auxiliary/tgsi/tgsi_sanity.c | 6 | ||||
-rw-r--r-- | src/gallium/auxiliary/tgsi/tgsi_sse2.c | 4 |
6 files changed, 21 insertions, 21 deletions
diff --git a/src/gallium/auxiliary/tgsi/tgsi-instruction-set.txt b/src/gallium/auxiliary/tgsi/tgsi-instruction-set.txt index 5f88cc2acac..802ec371189 100644 --- a/src/gallium/auxiliary/tgsi/tgsi-instruction-set.txt +++ b/src/gallium/auxiliary/tgsi/tgsi-instruction-set.txt @@ -665,14 +665,14 @@ TGSI Instruction Specification TBD -1.9.8 LOOP - Loop +1.9.8 BGNFOR - Begin a For-Loop dst.x = floor(src.x) dst.y = floor(src.y) dst.z = floor(src.z) if (dst.y <= 0) - pc = [matching ENDLOOP] + 1 + pc = [matching ENDFOR] + 1 endif Note: The destination must be a loop register. @@ -694,13 +694,13 @@ TGSI Instruction Specification TBD -1.9.12 ENDLOOP - End Loop +1.9.12 ENDFOR - End a For-Loop dst.x = dst.x + dst.z dst.y = dst.y - 1.0 if (dst.y > 0) - pc = [matching LOOP instruction] + 1 + pc = [matching BGNFOR instruction] + 1 endif Note: The destination must be a loop register. @@ -856,7 +856,7 @@ TGSI Instruction Specification ---------- -1.13.1 BGNLOOP2 - Begin Loop +1.13.1 BGNLOOP - Begin a Loop TBD @@ -866,7 +866,7 @@ TGSI Instruction Specification TBD -1.13.3 ENDLOOP2 - End Loop +1.13.3 ENDLOOP - End a Loop TBD diff --git a/src/gallium/auxiliary/tgsi/tgsi_dump.c b/src/gallium/auxiliary/tgsi/tgsi_dump.c index 4ca3a16b8ae..f36b1114a95 100644 --- a/src/gallium/auxiliary/tgsi/tgsi_dump.c +++ b/src/gallium/auxiliary/tgsi/tgsi_dump.c @@ -473,8 +473,8 @@ iter_instruction( switch (inst->Instruction.Opcode) { case TGSI_OPCODE_IF: case TGSI_OPCODE_ELSE: - case TGSI_OPCODE_BGNLOOP2: - case TGSI_OPCODE_ENDLOOP2: + case TGSI_OPCODE_BGNLOOP: + case TGSI_OPCODE_ENDLOOP: case TGSI_OPCODE_CAL: TXT( " :" ); UID( inst->InstructionExtLabel.Label ); diff --git a/src/gallium/auxiliary/tgsi/tgsi_exec.c b/src/gallium/auxiliary/tgsi/tgsi_exec.c index 0179bba5a21..5af0a947947 100644 --- a/src/gallium/auxiliary/tgsi/tgsi_exec.c +++ b/src/gallium/auxiliary/tgsi/tgsi_exec.c @@ -3087,9 +3087,9 @@ exec_instruction( mach->Primitives[mach->Temps[TEMP_PRIMITIVE_I].xyzw[TEMP_PRIMITIVE_C].u[0]] = 0; break; - case TGSI_OPCODE_LOOP: + case TGSI_OPCODE_BGNFOR: /* fall-through (for now) */ - case TGSI_OPCODE_BGNLOOP2: + case TGSI_OPCODE_BGNLOOP: /* push LoopMask and ContMasks */ assert(mach->LoopStackTop < TGSI_EXEC_MAX_LOOP_NESTING); mach->LoopStack[mach->LoopStackTop++] = mach->LoopMask; @@ -3097,9 +3097,9 @@ exec_instruction( mach->ContStack[mach->ContStackTop++] = mach->ContMask; break; - case TGSI_OPCODE_ENDLOOP: + case TGSI_OPCODE_ENDFOR: /* fall-through (for now at least) */ - case TGSI_OPCODE_ENDLOOP2: + case TGSI_OPCODE_ENDLOOP: /* Restore ContMask, but don't pop */ assert(mach->ContStackTop > 0); mach->ContMask = mach->ContStack[mach->ContStackTop - 1]; diff --git a/src/gallium/auxiliary/tgsi/tgsi_info.c b/src/gallium/auxiliary/tgsi/tgsi_info.c index 3a47e9b84df..cd8871e32dd 100644 --- a/src/gallium/auxiliary/tgsi/tgsi_info.c +++ b/src/gallium/auxiliary/tgsi/tgsi_info.c @@ -106,11 +106,11 @@ static const struct tgsi_opcode_info opcode_info[TGSI_OPCODE_LAST] = { 1, 2, 1, 0, "TXL", TGSI_OPCODE_TXL }, { 0, 0, 0, 0, "BRK", TGSI_OPCODE_BRK }, { 0, 1, 0, 1, "IF", TGSI_OPCODE_IF }, - { 1, 1, 0, 0, "LOOP", TGSI_OPCODE_LOOP }, + { 1, 1, 0, 0, "BGNFOR", TGSI_OPCODE_BGNFOR }, { 0, 1, 0, 0, "REP", TGSI_OPCODE_REP }, { 0, 0, 0, 1, "ELSE", TGSI_OPCODE_ELSE }, { 0, 0, 0, 0, "ENDIF", TGSI_OPCODE_ENDIF }, - { 1, 0, 0, 0, "ENDLOOP", TGSI_OPCODE_ENDLOOP }, + { 1, 0, 0, 0, "ENDFOR", TGSI_OPCODE_ENDFOR }, { 0, 0, 0, 0, "ENDREP", TGSI_OPCODE_ENDREP }, { 0, 1, 0, 0, "PUSHA", TGSI_OPCODE_PUSHA }, { 1, 0, 0, 0, "POPA", TGSI_OPCODE_POPA }, @@ -130,9 +130,9 @@ static const struct tgsi_opcode_info opcode_info[TGSI_OPCODE_LAST] = { 0, 0, 0, 0, "CONT", TGSI_OPCODE_CONT }, { 0, 0, 0, 0, "EMIT", TGSI_OPCODE_EMIT }, { 0, 0, 0, 0, "ENDPRIM", TGSI_OPCODE_ENDPRIM }, - { 0, 0, 0, 1, "BGNLOOP2", TGSI_OPCODE_BGNLOOP2 }, + { 0, 0, 0, 1, "BGNLOOP", TGSI_OPCODE_BGNLOOP }, { 0, 0, 0, 0, "BGNSUB", TGSI_OPCODE_BGNSUB }, - { 0, 0, 0, 1, "ENDLOOP2", TGSI_OPCODE_ENDLOOP2 }, + { 0, 0, 0, 1, "ENDLOOP", TGSI_OPCODE_ENDLOOP }, { 0, 0, 0, 0, "ENDSUB", TGSI_OPCODE_ENDSUB }, { 1, 1, 0, 0, "NOISE1", TGSI_OPCODE_NOISE1 }, { 1, 1, 0, 0, "NOISE2", TGSI_OPCODE_NOISE2 }, diff --git a/src/gallium/auxiliary/tgsi/tgsi_sanity.c b/src/gallium/auxiliary/tgsi/tgsi_sanity.c index cb62a95fc0a..4fe8553c423 100644 --- a/src/gallium/auxiliary/tgsi/tgsi_sanity.c +++ b/src/gallium/auxiliary/tgsi/tgsi_sanity.c @@ -242,8 +242,8 @@ iter_instruction( } switch (inst->Instruction.Opcode) { - case TGSI_OPCODE_LOOP: - case TGSI_OPCODE_ENDLOOP: + case TGSI_OPCODE_BGNFOR: + case TGSI_OPCODE_ENDFOR: if (inst->FullDstRegisters[0].DstRegister.File != TGSI_FILE_LOOP || inst->FullDstRegisters[0].DstRegister.Index != 0) { report_error(ctx, "Destination register must be LOOP[0]"); @@ -252,7 +252,7 @@ iter_instruction( } switch (inst->Instruction.Opcode) { - case TGSI_OPCODE_LOOP: + case TGSI_OPCODE_BGNFOR: if (inst->FullSrcRegisters[0].SrcRegister.File != TGSI_FILE_CONSTANT && inst->FullSrcRegisters[0].SrcRegister.File != TGSI_FILE_IMMEDIATE) { report_error(ctx, "Source register file must be either CONST or IMM"); diff --git a/src/gallium/auxiliary/tgsi/tgsi_sse2.c b/src/gallium/auxiliary/tgsi/tgsi_sse2.c index 16848f7cc5e..52186770e6a 100644 --- a/src/gallium/auxiliary/tgsi/tgsi_sse2.c +++ b/src/gallium/auxiliary/tgsi/tgsi_sse2.c @@ -2531,7 +2531,7 @@ emit_instruction( return 0; break; - case TGSI_OPCODE_LOOP: + case TGSI_OPCODE_BGNFOR: return 0; break; @@ -2547,7 +2547,7 @@ emit_instruction( return 0; break; - case TGSI_OPCODE_ENDLOOP: + case TGSI_OPCODE_ENDFOR: return 0; break; |