diff options
author | Marek Olšák <[email protected]> | 2017-08-19 20:25:08 +0200 |
---|---|---|
committer | Marek Olšák <[email protected]> | 2017-08-22 16:42:17 +0200 |
commit | 497506ad93d737db0c75f512626df2ae82c27560 (patch) | |
tree | af19e9b67d6fdac75576f4928bf2aa7405c7045a /src/gallium/auxiliary/tgsi | |
parent | 33efa6416f6ec58a5ec535c4c11501850514d5e7 (diff) |
gallium: remove TGSI opcode SCS
use COS+SIN instead.
Reviewed-by: Roland Scheidegger <[email protected]>
Acked-by: Jose Fonseca <[email protected]>
Diffstat (limited to 'src/gallium/auxiliary/tgsi')
-rw-r--r-- | src/gallium/auxiliary/tgsi/tgsi_exec.c | 31 | ||||
-rw-r--r-- | src/gallium/auxiliary/tgsi/tgsi_info.c | 2 | ||||
-rw-r--r-- | src/gallium/auxiliary/tgsi/tgsi_lowering.c | 75 | ||||
-rw-r--r-- | src/gallium/auxiliary/tgsi/tgsi_lowering.h | 1 | ||||
-rw-r--r-- | src/gallium/auxiliary/tgsi/tgsi_opcode_tmp.h | 1 | ||||
-rw-r--r-- | src/gallium/auxiliary/tgsi/tgsi_util.c | 4 |
6 files changed, 1 insertions, 113 deletions
diff --git a/src/gallium/auxiliary/tgsi/tgsi_exec.c b/src/gallium/auxiliary/tgsi/tgsi_exec.c index 3be5bd5dd50..c58ea6ad09c 100644 --- a/src/gallium/auxiliary/tgsi/tgsi_exec.c +++ b/src/gallium/auxiliary/tgsi/tgsi_exec.c @@ -3286,33 +3286,6 @@ exec_ucmp(struct tgsi_exec_machine *mach, } static void -exec_scs(struct tgsi_exec_machine *mach, - const struct tgsi_full_instruction *inst) -{ - if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_XY) { - union tgsi_exec_channel arg; - union tgsi_exec_channel result; - - fetch_source(mach, &arg, &inst->Src[0], TGSI_CHAN_X, TGSI_EXEC_DATA_FLOAT); - - if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_X) { - micro_cos(&result, &arg); - store_dest(mach, &result, &inst->Dst[0], inst, TGSI_CHAN_X, TGSI_EXEC_DATA_FLOAT); - } - if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_Y) { - micro_sin(&result, &arg); - store_dest(mach, &result, &inst->Dst[0], inst, TGSI_CHAN_Y, TGSI_EXEC_DATA_FLOAT); - } - } - if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_Z) { - store_dest(mach, &ZeroVec, &inst->Dst[0], inst, TGSI_CHAN_Z, TGSI_EXEC_DATA_FLOAT); - } - if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_W) { - store_dest(mach, &OneVec, &inst->Dst[0], inst, TGSI_CHAN_W, TGSI_EXEC_DATA_FLOAT); - } -} - -static void exec_dst(struct tgsi_exec_machine *mach, const struct tgsi_full_instruction *inst) { @@ -5334,10 +5307,6 @@ exec_instruction( exec_vector_trinary(mach, inst, micro_cmp, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT); break; - case TGSI_OPCODE_SCS: - exec_scs(mach, inst); - break; - case TGSI_OPCODE_DIV: exec_vector_binary(mach, inst, micro_div, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT); break; diff --git a/src/gallium/auxiliary/tgsi/tgsi_info.c b/src/gallium/auxiliary/tgsi/tgsi_info.c index 0368c457c41..0a82dbb14ca 100644 --- a/src/gallium/auxiliary/tgsi/tgsi_info.c +++ b/src/gallium/auxiliary/tgsi/tgsi_info.c @@ -104,7 +104,7 @@ static const struct tgsi_opcode_info opcode_info[TGSI_OPCODE_LAST] = { 0, 0, 0, 0, 0, 0, 0, NONE, "RET", TGSI_OPCODE_RET }, { 1, 1, 0, 0, 0, 0, 0, COMP, "SSG", TGSI_OPCODE_SSG }, { 1, 3, 0, 0, 0, 0, 0, COMP, "CMP", TGSI_OPCODE_CMP }, - { 1, 1, 0, 0, 0, 0, 0, CHAN, "SCS", TGSI_OPCODE_SCS }, + { 1, 1, 0, 0, 0, 0, 0, CHAN, "", 67 }, /* removed */ { 1, 2, 1, 0, 0, 0, 0, OTHR, "TXB", TGSI_OPCODE_TXB }, { 1, 1, 0, 0, 0, 0, 0, OTHR, "FBFETCH", TGSI_OPCODE_FBFETCH }, { 1, 2, 0, 0, 0, 0, 0, COMP, "DIV", TGSI_OPCODE_DIV }, diff --git a/src/gallium/auxiliary/tgsi/tgsi_lowering.c b/src/gallium/auxiliary/tgsi/tgsi_lowering.c index fa9d579f77b..bfc3a6bfe36 100644 --- a/src/gallium/auxiliary/tgsi/tgsi_lowering.c +++ b/src/gallium/auxiliary/tgsi/tgsi_lowering.c @@ -258,71 +258,6 @@ transform_dst(struct tgsi_transform_context *tctx, } } -/* SCS - Sine Cosine - * dst.x = \cos{src.x} - * dst.y = \sin{src.x} - * dst.z = 0.0 - * dst.w = 1.0 - * - * ; needs: 1 tmp, imm{0.0, 1.0} - * if (dst.x aliases src.x) { - * MOV tmpA.x, src.x - * src = tmpA - * } - * COS dst.x, src.x - * SIN dst.y, src.x - * MOV dst.zw, imm{0.0, 1.0} - */ -#define SCS_GROW (NINST(1) + NINST(1) + NINST(1) + NINST(1) - OINST(1)) -#define SCS_TMP 1 -static void -transform_scs(struct tgsi_transform_context *tctx, - struct tgsi_full_instruction *inst) -{ - struct tgsi_lowering_context *ctx = tgsi_lowering_context(tctx); - struct tgsi_full_dst_register *dst = &inst->Dst[0]; - struct tgsi_full_src_register *src = &inst->Src[0]; - struct tgsi_full_instruction new_inst; - - if (aliases(dst, TGSI_WRITEMASK_X, src, TGSI_WRITEMASK_X)) { - create_mov(tctx, &ctx->tmp[A].dst, src, TGSI_WRITEMASK_X, 0); - src = &ctx->tmp[A].src; - } - - if (dst->Register.WriteMask & TGSI_WRITEMASK_X) { - /* COS dst.x, src.x */ - new_inst = tgsi_default_full_instruction(); - new_inst.Instruction.Opcode = TGSI_OPCODE_COS; - new_inst.Instruction.NumDstRegs = 1; - reg_dst(&new_inst.Dst[0], dst, TGSI_WRITEMASK_X); - new_inst.Instruction.NumSrcRegs = 1; - reg_src(&new_inst.Src[0], src, SWIZ(X, _, _, _)); - tctx->emit_instruction(tctx, &new_inst); - } - - if (dst->Register.WriteMask & TGSI_WRITEMASK_Y) { - /* SIN dst.y, src.x */ - new_inst = tgsi_default_full_instruction(); - new_inst.Instruction.Opcode = TGSI_OPCODE_SIN; - new_inst.Instruction.NumDstRegs = 1; - reg_dst(&new_inst.Dst[0], dst, TGSI_WRITEMASK_Y); - new_inst.Instruction.NumSrcRegs = 1; - reg_src(&new_inst.Src[0], src, SWIZ(X, _, _, _)); - tctx->emit_instruction(tctx, &new_inst); - } - - if (dst->Register.WriteMask & TGSI_WRITEMASK_ZW) { - /* MOV dst.zw, imm{0.0, 1.0} */ - new_inst = tgsi_default_full_instruction(); - new_inst.Instruction.Opcode = TGSI_OPCODE_MOV; - new_inst.Instruction.NumDstRegs = 1; - reg_dst(&new_inst.Dst[0], dst, TGSI_WRITEMASK_ZW); - new_inst.Instruction.NumSrcRegs = 1; - reg_src(&new_inst.Src[0], &ctx->imm, SWIZ(_, _, X, Y)); - tctx->emit_instruction(tctx, &new_inst); - } -} - /* LRP - Linear Interpolate * dst.x = src0.x \times src1.x + (1.0 - src0.x) \times src2.x * dst.y = src0.y \times src1.y + (1.0 - src0.y) \times src2.y @@ -1407,11 +1342,6 @@ transform_instr(struct tgsi_transform_context *tctx, goto skip; transform_dst(tctx, inst); break; - case TGSI_OPCODE_SCS: - if (!ctx->config->lower_SCS) - goto skip; - transform_scs(tctx, inst); - break; case TGSI_OPCODE_LRP: if (!ctx->config->lower_LRP) goto skip; @@ -1535,7 +1465,6 @@ tgsi_transform_lowering(const struct tgsi_lowering_config *config, #define OPCS(x) ((config->lower_ ## x) ? info->opcode_count[TGSI_OPCODE_ ## x] : 0) /* if there are no instructions to lower, then we are done: */ if (!(OPCS(DST) || - OPCS(SCS) || OPCS(LRP) || OPCS(FRC) || OPCS(POW) || @@ -1564,10 +1493,6 @@ tgsi_transform_lowering(const struct tgsi_lowering_config *config, newlen += DST_GROW * OPCS(DST); numtmp = MAX2(numtmp, DST_TMP); } - if (OPCS(SCS)) { - newlen += SCS_GROW * OPCS(SCS); - numtmp = MAX2(numtmp, SCS_TMP); - } if (OPCS(LRP)) { newlen += LRP_GROW * OPCS(LRP); numtmp = MAX2(numtmp, LRP_TMP); diff --git a/src/gallium/auxiliary/tgsi/tgsi_lowering.h b/src/gallium/auxiliary/tgsi/tgsi_lowering.h index 709a63a601b..fd4c38f016e 100644 --- a/src/gallium/auxiliary/tgsi/tgsi_lowering.h +++ b/src/gallium/auxiliary/tgsi/tgsi_lowering.h @@ -55,7 +55,6 @@ struct tgsi_lowering_config * enable lowering of TGSI_OPCODE_<opc> */ unsigned lower_DST:1; - unsigned lower_SCS:1; unsigned lower_LRP:1; unsigned lower_FRC:1; unsigned lower_POW:1; diff --git a/src/gallium/auxiliary/tgsi/tgsi_opcode_tmp.h b/src/gallium/auxiliary/tgsi/tgsi_opcode_tmp.h index 826bcaf5a0c..9a13fa6684a 100644 --- a/src/gallium/auxiliary/tgsi/tgsi_opcode_tmp.h +++ b/src/gallium/auxiliary/tgsi/tgsi_opcode_tmp.h @@ -90,7 +90,6 @@ OP00_LBL(CAL) OP00(RET) OP11(SSG) OP13(CMP) -OP11(SCS) OP12_TEX(TXB) OP12(DIV) OP12(DP2) diff --git a/src/gallium/auxiliary/tgsi/tgsi_util.c b/src/gallium/auxiliary/tgsi/tgsi_util.c index 6756bca23df..327e42f7402 100644 --- a/src/gallium/auxiliary/tgsi/tgsi_util.c +++ b/src/gallium/auxiliary/tgsi/tgsi_util.c @@ -253,10 +253,6 @@ tgsi_util_get_inst_usage_mask(const struct tgsi_full_instruction *inst, read_mask = TGSI_WRITEMASK_X; break; - case TGSI_OPCODE_SCS: - read_mask = write_mask & TGSI_WRITEMASK_XY ? TGSI_WRITEMASK_X : 0; - break; - case TGSI_OPCODE_EXP: case TGSI_OPCODE_LOG: read_mask = write_mask & TGSI_WRITEMASK_XYZ ? TGSI_WRITEMASK_X : 0; |