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authorChia-I Wu <[email protected]>2013-05-04 09:44:39 +0800
committerChia-I Wu <[email protected]>2013-05-08 11:03:24 +0800
commit8a52453f5d6fa5e08955f9d4f952400fbe5624d2 (patch)
tree60d1e8a58074515462c3a4bbc2902eda0f6d0e68 /src/gallium/auxiliary/tgsi
parent61d57ec2768fde57cb3926d6757044593d6e9a08 (diff)
tgsi: reorder opcodes in opcode type inference
Reorder opcodes by their assigned numbers. This makes it easier to see the differences between tgsi_opcode_infer_src_type() and tgsi_opcode_infer_dst_type(). Signed-off-by: Chia-I Wu <[email protected]> Acked-by: Roland Scheidegger <[email protected]>
Diffstat (limited to 'src/gallium/auxiliary/tgsi')
-rw-r--r--src/gallium/auxiliary/tgsi/tgsi_info.c48
1 files changed, 24 insertions, 24 deletions
diff --git a/src/gallium/auxiliary/tgsi/tgsi_info.c b/src/gallium/auxiliary/tgsi/tgsi_info.c
index eec49a8d2ef..f3d15c9a2a1 100644
--- a/src/gallium/auxiliary/tgsi/tgsi_info.c
+++ b/src/gallium/auxiliary/tgsi/tgsi_info.c
@@ -274,37 +274,37 @@ tgsi_opcode_infer_src_type( uint opcode )
switch (opcode) {
case TGSI_OPCODE_MOV:
return TGSI_TYPE_UNTYPED;
+ case TGSI_OPCODE_UIF:
+ case TGSI_OPCODE_SHL:
case TGSI_OPCODE_AND:
case TGSI_OPCODE_OR:
case TGSI_OPCODE_XOR:
/* XXX some src args may be signed for SAD ? */
case TGSI_OPCODE_SAD:
+ case TGSI_OPCODE_TXF:
+ case TGSI_OPCODE_TXQ:
+ case TGSI_OPCODE_BREAKC:
case TGSI_OPCODE_U2F:
case TGSI_OPCODE_UADD:
case TGSI_OPCODE_UDIV:
- case TGSI_OPCODE_UMOD:
case TGSI_OPCODE_UMAD:
- case TGSI_OPCODE_UMUL:
case TGSI_OPCODE_UMAX:
case TGSI_OPCODE_UMIN:
+ case TGSI_OPCODE_UMOD:
+ case TGSI_OPCODE_UMUL:
case TGSI_OPCODE_USEQ:
case TGSI_OPCODE_USGE:
+ case TGSI_OPCODE_USHR:
case TGSI_OPCODE_USLT:
case TGSI_OPCODE_USNE:
- case TGSI_OPCODE_USHR:
- case TGSI_OPCODE_SHL:
- case TGSI_OPCODE_TXQ:
- case TGSI_OPCODE_SVIEWINFO:
- case TGSI_OPCODE_TXF:
+ case TGSI_OPCODE_SWITCH:
+ case TGSI_OPCODE_CASE:
case TGSI_OPCODE_SAMPLE_I:
case TGSI_OPCODE_SAMPLE_I_MS:
- case TGSI_OPCODE_UIF:
- case TGSI_OPCODE_CASE:
- case TGSI_OPCODE_SWITCH:
- case TGSI_OPCODE_BREAKC:
+ case TGSI_OPCODE_SVIEWINFO:
return TGSI_TYPE_UNSIGNED;
- case TGSI_OPCODE_MOD:
case TGSI_OPCODE_I2F:
+ case TGSI_OPCODE_MOD:
case TGSI_OPCODE_IDIV:
case TGSI_OPCODE_IMAX:
case TGSI_OPCODE_IMIN:
@@ -312,9 +312,9 @@ tgsi_opcode_infer_src_type( uint opcode )
case TGSI_OPCODE_ISGE:
case TGSI_OPCODE_ISHR:
case TGSI_OPCODE_ISLT:
+ case TGSI_OPCODE_UARL:
case TGSI_OPCODE_IABS:
case TGSI_OPCODE_ISSG:
- case TGSI_OPCODE_UARL:
return TGSI_TYPE_SIGNED;
default:
return TGSI_TYPE_FLOAT;
@@ -332,27 +332,30 @@ tgsi_opcode_infer_dst_type( uint opcode )
case TGSI_OPCODE_MOV:
case TGSI_OPCODE_UCMP:
return TGSI_TYPE_UNTYPED;
- case TGSI_OPCODE_F2U:
+ case TGSI_OPCODE_SHL:
case TGSI_OPCODE_AND:
case TGSI_OPCODE_OR:
case TGSI_OPCODE_XOR:
case TGSI_OPCODE_SAD:
+ case TGSI_OPCODE_TXQ:
+ case TGSI_OPCODE_TXQ_LZ:
+ case TGSI_OPCODE_F2U:
case TGSI_OPCODE_UDIV:
- case TGSI_OPCODE_UMOD:
case TGSI_OPCODE_UMAD:
- case TGSI_OPCODE_UMUL:
case TGSI_OPCODE_UMAX:
case TGSI_OPCODE_UMIN:
+ case TGSI_OPCODE_UMOD:
+ case TGSI_OPCODE_UMUL:
case TGSI_OPCODE_USEQ:
case TGSI_OPCODE_USGE:
+ case TGSI_OPCODE_USHR:
case TGSI_OPCODE_USLT:
case TGSI_OPCODE_USNE:
- case TGSI_OPCODE_USHR:
- case TGSI_OPCODE_SHL:
- case TGSI_OPCODE_TXQ:
- case TGSI_OPCODE_TXQ_LZ:
case TGSI_OPCODE_SVIEWINFO:
return TGSI_TYPE_UNSIGNED;
+ case TGSI_OPCODE_ARL:
+ case TGSI_OPCODE_ARR:
+ case TGSI_OPCODE_MOD:
case TGSI_OPCODE_F2I:
case TGSI_OPCODE_IDIV:
case TGSI_OPCODE_IMAX:
@@ -361,13 +364,10 @@ tgsi_opcode_infer_dst_type( uint opcode )
case TGSI_OPCODE_ISGE:
case TGSI_OPCODE_ISHR:
case TGSI_OPCODE_ISLT:
- case TGSI_OPCODE_MOD:
+ case TGSI_OPCODE_UADD:
case TGSI_OPCODE_UARL:
- case TGSI_OPCODE_ARL:
- case TGSI_OPCODE_ARR:
case TGSI_OPCODE_IABS:
case TGSI_OPCODE_ISSG:
- case TGSI_OPCODE_UADD:
return TGSI_TYPE_SIGNED;
default:
return TGSI_TYPE_FLOAT;