diff options
author | Marek Olšák <[email protected]> | 2016-03-10 13:20:36 +0100 |
---|---|---|
committer | Marek Olšák <[email protected]> | 2016-03-19 23:20:01 +0100 |
commit | fbe6e92899f90e7ee85420e88c807a1f2fd2be14 (patch) | |
tree | e26372e2b5ff06e17f5308fef405c1829126bcdd /src/gallium/auxiliary/tgsi/tgsi_ureg.c | |
parent | 9184d9a0bbe8a8b88d676a20f95d66ceee9eaf21 (diff) |
gallium: add TGSI property NEXT_SHADER
Radeonsi needs to know which shader stage will execute after a shader
in order to make the best decision about which shader variant to compile
first.
This is only set for VS and TES, because we don't need it elsewhere.
VS has 3 variants:
- next shader is FS
- next shader is GS
- next shader is TCS
TES has 2 variants:
- next shader is FS
- next shader is GS
Currently, radeonsi always assumes the next shader is FS, which is suboptimal,
since st/mesa always knows which shader is next if the GLSL program is not
a "separate shader".
By default, ureg always sets "next shader is FS".
Reviewed-by: Nicolai Hähnle <[email protected]>
Diffstat (limited to 'src/gallium/auxiliary/tgsi/tgsi_ureg.c')
-rw-r--r-- | src/gallium/auxiliary/tgsi/tgsi_ureg.c | 19 |
1 files changed, 19 insertions, 0 deletions
diff --git a/src/gallium/auxiliary/tgsi/tgsi_ureg.c b/src/gallium/auxiliary/tgsi/tgsi_ureg.c index ab1d03458ef..0dd5ea76f33 100644 --- a/src/gallium/auxiliary/tgsi/tgsi_ureg.c +++ b/src/gallium/auxiliary/tgsi/tgsi_ureg.c @@ -101,6 +101,7 @@ struct ureg_program { unsigned processor; bool supports_any_inout_decl_range; + int next_shader_processor; struct { unsigned semantic_name; @@ -1966,6 +1967,16 @@ const struct tgsi_token *ureg_finalize( struct ureg_program *ureg ) { const struct tgsi_token *tokens; + switch (ureg->processor) { + case TGSI_PROCESSOR_VERTEX: + case TGSI_PROCESSOR_TESS_EVAL: + ureg_property(ureg, TGSI_PROPERTY_NEXT_SHADER, + ureg->next_shader_processor == -1 ? + TGSI_PROCESSOR_FRAGMENT : + ureg->next_shader_processor); + break; + } + emit_header( ureg ); emit_decls( ureg ); copy_instructions( ureg ); @@ -2079,6 +2090,7 @@ ureg_create_with_screen(unsigned processor, struct pipe_screen *screen) screen->get_shader_param(screen, util_pipe_shader_from_tgsi_processor(processor), PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE) != 0; + ureg->next_shader_processor = -1; for (i = 0; i < Elements(ureg->properties); i++) ureg->properties[i] = ~0; @@ -2108,6 +2120,13 @@ no_ureg: } +void +ureg_set_next_shader_processor(struct ureg_program *ureg, unsigned processor) +{ + ureg->next_shader_processor = processor; +} + + unsigned ureg_get_nr_outputs( const struct ureg_program *ureg ) { |