diff options
| author | Christoph Bumiller <[email protected]> | 2014-05-17 01:20:19 +0200 |
|---|---|---|
| committer | Marek Olšák <[email protected]> | 2014-06-02 12:49:03 +0200 |
| commit | 4b586a26c8ab8804dacbf400f5fd53b5a1f70dac (patch) | |
| tree | 0f0560183823fb697a8584db7fa4c1b767a68514 /src/gallium/auxiliary/tgsi/tgsi_ureg.c | |
| parent | 304f64bb501f2b6f5760e77859557192c0bf5774 (diff) | |
gallium: create TGSI_PROPERTY to disable viewport and clipping
Marek v2: add a cap
Signed-off-by: Marek Olšák <[email protected]>
Diffstat (limited to 'src/gallium/auxiliary/tgsi/tgsi_ureg.c')
| -rw-r--r-- | src/gallium/auxiliary/tgsi/tgsi_ureg.c | 16 |
1 files changed, 16 insertions, 0 deletions
diff --git a/src/gallium/auxiliary/tgsi/tgsi_ureg.c b/src/gallium/auxiliary/tgsi/tgsi_ureg.c index 2bf93ee6adb..bd0a3f79fbd 100644 --- a/src/gallium/auxiliary/tgsi/tgsi_ureg.c +++ b/src/gallium/auxiliary/tgsi/tgsi_ureg.c @@ -173,6 +173,7 @@ struct ureg_program unsigned char property_fs_coord_pixel_center; /* = TGSI_FS_COORD_PIXEL_CENTER_* */ unsigned char property_fs_color0_writes_all_cbufs; /* = TGSI_FS_COLOR0_WRITES_ALL_CBUFS * */ unsigned char property_fs_depth_layout; /* TGSI_FS_DEPTH_LAYOUT */ + boolean property_vs_window_space_position; /* TGSI_VS_WINDOW_SPACE_POSITION */ unsigned nr_addrs; unsigned nr_preds; @@ -331,6 +332,13 @@ ureg_property_fs_depth_layout(struct ureg_program *ureg, ureg->property_fs_depth_layout = fs_depth_layout; } +void +ureg_property_vs_window_space_position(struct ureg_program *ureg, + boolean vs_window_space_position) +{ + ureg->property_vs_window_space_position = vs_window_space_position; +} + struct ureg_src ureg_DECL_fs_input_cyl_centroid(struct ureg_program *ureg, unsigned semantic_name, @@ -1508,6 +1516,14 @@ static void emit_decls( struct ureg_program *ureg ) ureg->property_fs_depth_layout); } + if (ureg->property_vs_window_space_position) { + assert(ureg->processor == TGSI_PROCESSOR_VERTEX); + + emit_property(ureg, + TGSI_PROPERTY_VS_WINDOW_SPACE_POSITION, + ureg->property_vs_window_space_position); + } + if (ureg->processor == TGSI_PROCESSOR_VERTEX) { for (i = 0; i < UREG_MAX_INPUT; i++) { if (ureg->vs_inputs[i/32] & (1 << (i%32))) { |