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authorKeith Whitwell <[email protected]>2009-11-24 15:02:23 +0000
committerKeith Whitwell <[email protected]>2009-11-24 15:02:23 +0000
commit7d6c8f980d1e23ad6f557d650e89c715861a3b0c (patch)
treeb947e26ce1a03497b8a2863ef47d465089ac7ca9 /src/gallium/auxiliary/tgsi/tgsi_sanity.c
parent763426a0256f0ab06f8af53947bd630f8600183a (diff)
tgsi: rename fields of tgsi_full_instruction to avoid excessive verbosity
InstructionPredicate -> Predicate InstructionLabel -> Label InstructionTexture -> Texture FullSrcRegisters -> Src FullDstRegisters -> Dst
Diffstat (limited to 'src/gallium/auxiliary/tgsi/tgsi_sanity.c')
-rw-r--r--src/gallium/auxiliary/tgsi/tgsi_sanity.c24
1 files changed, 12 insertions, 12 deletions
diff --git a/src/gallium/auxiliary/tgsi/tgsi_sanity.c b/src/gallium/auxiliary/tgsi/tgsi_sanity.c
index 36e27ea52f4..8422b91a304 100644
--- a/src/gallium/auxiliary/tgsi/tgsi_sanity.c
+++ b/src/gallium/auxiliary/tgsi/tgsi_sanity.c
@@ -212,24 +212,24 @@ iter_instruction(
for (i = 0; i < inst->Instruction.NumDstRegs; i++) {
check_register_usage(
ctx,
- inst->FullDstRegisters[i].DstRegister.File,
- inst->FullDstRegisters[i].DstRegister.Index,
+ inst->Dst[i].DstRegister.File,
+ inst->Dst[i].DstRegister.Index,
"destination",
FALSE );
}
for (i = 0; i < inst->Instruction.NumSrcRegs; i++) {
check_register_usage(
ctx,
- inst->FullSrcRegisters[i].SrcRegister.File,
- inst->FullSrcRegisters[i].SrcRegister.Index,
+ inst->Src[i].SrcRegister.File,
+ inst->Src[i].SrcRegister.Index,
"source",
- (boolean)inst->FullSrcRegisters[i].SrcRegister.Indirect );
- if (inst->FullSrcRegisters[i].SrcRegister.Indirect) {
+ (boolean)inst->Src[i].SrcRegister.Indirect );
+ if (inst->Src[i].SrcRegister.Indirect) {
uint file;
int index;
- file = inst->FullSrcRegisters[i].SrcRegisterInd.File;
- index = inst->FullSrcRegisters[i].SrcRegisterInd.Index;
+ file = inst->Src[i].SrcRegisterInd.File;
+ index = inst->Src[i].SrcRegisterInd.Index;
check_register_usage(
ctx,
file,
@@ -245,8 +245,8 @@ iter_instruction(
switch (inst->Instruction.Opcode) {
case TGSI_OPCODE_BGNFOR:
case TGSI_OPCODE_ENDFOR:
- if (inst->FullDstRegisters[0].DstRegister.File != TGSI_FILE_LOOP ||
- inst->FullDstRegisters[0].DstRegister.Index != 0) {
+ if (inst->Dst[0].DstRegister.File != TGSI_FILE_LOOP ||
+ inst->Dst[0].DstRegister.Index != 0) {
report_error(ctx, "Destination register must be LOOP[0]");
}
break;
@@ -254,8 +254,8 @@ iter_instruction(
switch (inst->Instruction.Opcode) {
case TGSI_OPCODE_BGNFOR:
- if (inst->FullSrcRegisters[0].SrcRegister.File != TGSI_FILE_CONSTANT &&
- inst->FullSrcRegisters[0].SrcRegister.File != TGSI_FILE_IMMEDIATE) {
+ if (inst->Src[0].SrcRegister.File != TGSI_FILE_CONSTANT &&
+ inst->Src[0].SrcRegister.File != TGSI_FILE_IMMEDIATE) {
report_error(ctx, "Source register file must be either CONST or IMM");
}
break;