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authorTom Stellard <[email protected]>2012-01-14 08:46:05 -0500
committerTom Stellard <[email protected]>2012-01-30 13:37:00 -0500
commit6b63e25b3d7a6ac0bd738c139ead0c7e7ad84368 (patch)
treecd2731a2d948eb1cd48e1783b4045e8f8fce4e3b /src/gallium/auxiliary/tgsi/tgsi_exec.c
parent9ee1bcf7a5442ccb517a5cfbaf024755bd4d2738 (diff)
gallium: Prefix #defines in tgsi_exec.h with TGSI_
Diffstat (limited to 'src/gallium/auxiliary/tgsi/tgsi_exec.c')
-rw-r--r--src/gallium/auxiliary/tgsi/tgsi_exec.c100
1 files changed, 50 insertions, 50 deletions
diff --git a/src/gallium/auxiliary/tgsi/tgsi_exec.c b/src/gallium/auxiliary/tgsi/tgsi_exec.c
index 3774b610aec..c4ad34b1e61 100644
--- a/src/gallium/auxiliary/tgsi/tgsi_exec.c
+++ b/src/gallium/auxiliary/tgsi/tgsi_exec.c
@@ -602,7 +602,7 @@ tgsi_check_soa_dependencies(const struct tgsi_full_instruction *inst)
inst->Dst[0].Register.Indirect)) {
/* loop over dest channels */
uint channelsWritten = 0x0;
- for (chan = 0; chan < NUM_CHANNELS; chan++) {
+ for (chan = 0; chan < TGSI_NUM_CHANNELS; chan++) {
if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
/* check if we're reading a channel that's been written */
uint swizzle = tgsi_util_get_full_src_register_swizzle(&inst->Src[i], chan);
@@ -1055,7 +1055,7 @@ fetch_src_file_channel(const struct tgsi_exec_machine *mach,
switch (file) {
case TGSI_FILE_CONSTANT:
- for (i = 0; i < QUAD_SIZE; i++) {
+ for (i = 0; i < TGSI_QUAD_SIZE; i++) {
assert(index2D->i[i] >= 0 && index2D->i[i] < PIPE_MAX_CONSTANT_BUFFERS);
assert(mach->Consts[index2D->i[i]]);
@@ -1084,7 +1084,7 @@ fetch_src_file_channel(const struct tgsi_exec_machine *mach,
break;
case TGSI_FILE_INPUT:
- for (i = 0; i < QUAD_SIZE; i++) {
+ for (i = 0; i < TGSI_QUAD_SIZE; i++) {
/*
if (TGSI_PROCESSOR_GEOMETRY == mach->Processor) {
debug_printf("Fetching Input[%d] (2d=%d, 1d=%d)\n",
@@ -1102,13 +1102,13 @@ fetch_src_file_channel(const struct tgsi_exec_machine *mach,
/* XXX no swizzling at this point. Will be needed if we put
* gl_FragCoord, for example, in a sys value register.
*/
- for (i = 0; i < QUAD_SIZE; i++) {
+ for (i = 0; i < TGSI_QUAD_SIZE; i++) {
chan->u[i] = mach->SystemValue[index->i[i]].u[i];
}
break;
case TGSI_FILE_TEMPORARY:
- for (i = 0; i < QUAD_SIZE; i++) {
+ for (i = 0; i < TGSI_QUAD_SIZE; i++) {
assert(index->i[i] < TGSI_EXEC_NUM_TEMPS);
assert(index2D->i[i] == 0);
@@ -1117,7 +1117,7 @@ fetch_src_file_channel(const struct tgsi_exec_machine *mach,
break;
case TGSI_FILE_TEMPORARY_ARRAY:
- for (i = 0; i < QUAD_SIZE; i++) {
+ for (i = 0; i < TGSI_QUAD_SIZE; i++) {
assert(index->i[i] < TGSI_EXEC_NUM_TEMPS);
assert(index2D->i[i] < TGSI_EXEC_NUM_TEMP_ARRAYS);
@@ -1127,7 +1127,7 @@ fetch_src_file_channel(const struct tgsi_exec_machine *mach,
break;
case TGSI_FILE_IMMEDIATE:
- for (i = 0; i < QUAD_SIZE; i++) {
+ for (i = 0; i < TGSI_QUAD_SIZE; i++) {
assert(index->i[i] >= 0 && index->i[i] < (int)mach->ImmLimit);
assert(index2D->i[i] == 0);
@@ -1136,7 +1136,7 @@ fetch_src_file_channel(const struct tgsi_exec_machine *mach,
break;
case TGSI_FILE_IMMEDIATE_ARRAY:
- for (i = 0; i < QUAD_SIZE; i++) {
+ for (i = 0; i < TGSI_QUAD_SIZE; i++) {
assert(index2D->i[i] == 0);
chan->f[i] = mach->ImmArray[index->i[i]][swizzle];
@@ -1144,7 +1144,7 @@ fetch_src_file_channel(const struct tgsi_exec_machine *mach,
break;
case TGSI_FILE_ADDRESS:
- for (i = 0; i < QUAD_SIZE; i++) {
+ for (i = 0; i < TGSI_QUAD_SIZE; i++) {
assert(index->i[i] >= 0);
assert(index2D->i[i] == 0);
@@ -1153,7 +1153,7 @@ fetch_src_file_channel(const struct tgsi_exec_machine *mach,
break;
case TGSI_FILE_PREDICATE:
- for (i = 0; i < QUAD_SIZE; i++) {
+ for (i = 0; i < TGSI_QUAD_SIZE; i++) {
assert(index->i[i] >= 0 && index->i[i] < TGSI_EXEC_NUM_PREDS);
assert(index2D->i[i] == 0);
@@ -1163,7 +1163,7 @@ fetch_src_file_channel(const struct tgsi_exec_machine *mach,
case TGSI_FILE_OUTPUT:
/* vertex/fragment output vars can be read too */
- for (i = 0; i < QUAD_SIZE; i++) {
+ for (i = 0; i < TGSI_QUAD_SIZE; i++) {
assert(index->i[i] >= 0);
assert(index2D->i[i] == 0);
@@ -1173,7 +1173,7 @@ fetch_src_file_channel(const struct tgsi_exec_machine *mach,
default:
assert(0);
- for (i = 0; i < QUAD_SIZE; i++) {
+ for (i = 0; i < TGSI_QUAD_SIZE; i++) {
chan->u[i] = 0;
}
}
@@ -1243,7 +1243,7 @@ fetch_source(const struct tgsi_exec_machine *mach,
/* for disabled execution channels, zero-out the index to
* avoid using a potential garbage value.
*/
- for (i = 0; i < QUAD_SIZE; i++) {
+ for (i = 0; i < TGSI_QUAD_SIZE; i++) {
if ((execmask & (1 << i)) == 0)
index.i[i] = 0;
}
@@ -1302,7 +1302,7 @@ fetch_source(const struct tgsi_exec_machine *mach,
/* for disabled execution channels, zero-out the index to
* avoid using a potential garbage value.
*/
- for (i = 0; i < QUAD_SIZE; i++) {
+ for (i = 0; i < TGSI_QUAD_SIZE; i++) {
if ((execmask & (1 << i)) == 0) {
index2D.i[i] = 0;
}
@@ -1458,7 +1458,7 @@ store_dest(struct tgsi_exec_machine *mach,
/* for disabled execution channels, zero-out the index to
* avoid using a potential garbage value.
*/
- for (i = 0; i < QUAD_SIZE; i++) {
+ for (i = 0; i < TGSI_QUAD_SIZE; i++) {
if ((execmask & (1 << i)) == 0) {
index2D.i[i] = 0;
}
@@ -1488,7 +1488,7 @@ store_dest(struct tgsi_exec_machine *mach,
#if 0
if (TGSI_PROCESSOR_GEOMETRY == mach->Processor) {
fprintf(stderr, "STORING OUT[%d] mask(%d), = (", offset + index, execmask);
- for (i = 0; i < QUAD_SIZE; i++)
+ for (i = 0; i < TGSI_QUAD_SIZE; i++)
if (execmask & (1 << i))
fprintf(stderr, "%f, ", chan->f[i]);
fprintf(stderr, ")\n");
@@ -1555,13 +1555,13 @@ store_dest(struct tgsi_exec_machine *mach,
pred = &mach->Predicates[inst->Predicate.Index].xyzw[swizzle];
if (inst->Predicate.Negate) {
- for (i = 0; i < QUAD_SIZE; i++) {
+ for (i = 0; i < TGSI_QUAD_SIZE; i++) {
if (pred->u[i]) {
execmask &= ~(1 << i);
}
}
} else {
- for (i = 0; i < QUAD_SIZE; i++) {
+ for (i = 0; i < TGSI_QUAD_SIZE; i++) {
if (!pred->u[i]) {
execmask &= ~(1 << i);
}
@@ -1571,13 +1571,13 @@ store_dest(struct tgsi_exec_machine *mach,
switch (inst->Instruction.Saturate) {
case TGSI_SAT_NONE:
- for (i = 0; i < QUAD_SIZE; i++)
+ for (i = 0; i < TGSI_QUAD_SIZE; i++)
if (execmask & (1 << i))
dst->i[i] = chan->i[i];
break;
case TGSI_SAT_ZERO_ONE:
- for (i = 0; i < QUAD_SIZE; i++)
+ for (i = 0; i < TGSI_QUAD_SIZE; i++)
if (execmask & (1 << i)) {
if (chan->f[i] < 0.0f)
dst->f[i] = 0.0f;
@@ -1589,7 +1589,7 @@ store_dest(struct tgsi_exec_machine *mach,
break;
case TGSI_SAT_MINUS_PLUS_ONE:
- for (i = 0; i < QUAD_SIZE; i++)
+ for (i = 0; i < TGSI_QUAD_SIZE; i++)
if (execmask & (1 << i)) {
if (chan->f[i] < -1.0f)
dst->f[i] = -1.0f;
@@ -1672,7 +1672,7 @@ emit_vertex(struct tgsi_exec_machine *mach)
{
/* FIXME: check for exec mask correctly
unsigned i;
- for (i = 0; i < QUAD_SIZE; ++i) {
+ for (i = 0; i < TGSI_QUAD_SIZE; ++i) {
if ((mach->ExecMask & (1 << i)))
*/
if (mach->ExecMask) {
@@ -1687,7 +1687,7 @@ emit_primitive(struct tgsi_exec_machine *mach)
unsigned *prim_count = &mach->Temps[TEMP_PRIMITIVE_I].xyzw[TEMP_PRIMITIVE_C].u[0];
/* FIXME: check for exec mask correctly
unsigned i;
- for (i = 0; i < QUAD_SIZE; ++i) {
+ for (i = 0; i < TGSI_QUAD_SIZE; ++i) {
if ((mach->ExecMask & (1 << i)))
*/
if (mach->ExecMask) {
@@ -1726,7 +1726,7 @@ fetch_texel( struct tgsi_sampler *sampler,
union tgsi_exec_channel *a )
{
uint j;
- float rgba[NUM_CHANNELS][QUAD_SIZE];
+ float rgba[TGSI_NUM_CHANNELS][TGSI_QUAD_SIZE];
sampler->get_samples(sampler, s->f, t->f, p->f, c0->f, control, rgba);
@@ -1904,7 +1904,7 @@ exec_tex(struct tgsi_exec_machine *mach,
r[3].f[0], r[3].f[1], r[3].f[2], r[3].f[3]);
#endif
- for (chan = 0; chan < NUM_CHANNELS; chan++) {
+ for (chan = 0; chan < TGSI_NUM_CHANNELS; chan++) {
if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
store_dest(mach, &r[chan], &inst->Dst[0], inst, chan, TGSI_EXEC_DATA_FLOAT);
}
@@ -1983,7 +1983,7 @@ exec_txd(struct tgsi_exec_machine *mach,
assert(0);
}
- for (chan = 0; chan < NUM_CHANNELS; chan++) {
+ for (chan = 0; chan < TGSI_NUM_CHANNELS; chan++) {
if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
store_dest(mach, &r[chan], &inst->Dst[0], inst, chan, TGSI_EXEC_DATA_FLOAT);
}
@@ -2000,7 +2000,7 @@ exec_txf(struct tgsi_exec_machine *mach,
union tgsi_exec_channel r[4];
union tgsi_exec_channel offset[3];
uint chan;
- float rgba[NUM_CHANNELS][QUAD_SIZE];
+ float rgba[TGSI_NUM_CHANNELS][TGSI_QUAD_SIZE];
int j;
int8_t offsets[3];
@@ -2048,14 +2048,14 @@ exec_txf(struct tgsi_exec_machine *mach,
sampler->get_texel(sampler, r[0].i, r[1].i, r[2].i, r[3].i,
offsets, rgba);
- for (j = 0; j < QUAD_SIZE; j++) {
+ for (j = 0; j < TGSI_QUAD_SIZE; j++) {
r[0].f[j] = rgba[0][j];
r[1].f[j] = rgba[1][j];
r[2].f[j] = rgba[2][j];
r[3].f[j] = rgba[3][j];
}
- for (chan = 0; chan < NUM_CHANNELS; chan++) {
+ for (chan = 0; chan < TGSI_NUM_CHANNELS; chan++) {
if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
store_dest(mach, &r[chan], &inst->Dst[0], inst, chan, TGSI_EXEC_DATA_FLOAT);
}
@@ -2078,13 +2078,13 @@ exec_txq(struct tgsi_exec_machine *mach,
sampler->get_dims(sampler, src.i[0], result);
- for (i = 0; i < QUAD_SIZE; i++) {
+ for (i = 0; i < TGSI_QUAD_SIZE; i++) {
for (j = 0; j < 4; j++) {
r[j].i[i] = result[j];
}
}
- for (chan = 0; chan < NUM_CHANNELS; chan++) {
+ for (chan = 0; chan < TGSI_NUM_CHANNELS; chan++) {
if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
store_dest(mach, &r[chan], &inst->Dst[0], inst, chan,
TGSI_EXEC_DATA_INT);
@@ -2196,7 +2196,7 @@ exec_sample(struct tgsi_exec_machine *mach,
assert(0);
}
- for (chan = 0; chan < NUM_CHANNELS; chan++) {
+ for (chan = 0; chan < TGSI_NUM_CHANNELS; chan++) {
if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
store_dest(mach, &r[chan], &inst->Dst[0], inst, chan, TGSI_EXEC_DATA_FLOAT);
}
@@ -2259,7 +2259,7 @@ exec_sample_d(struct tgsi_exec_machine *mach,
assert(0);
}
- for (chan = 0; chan < NUM_CHANNELS; chan++) {
+ for (chan = 0; chan < TGSI_NUM_CHANNELS; chan++) {
if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
store_dest(mach, &r[chan], &inst->Dst[0], inst, chan, TGSI_EXEC_DATA_FLOAT);
}
@@ -2279,7 +2279,7 @@ eval_constant_coef(
{
unsigned i;
- for( i = 0; i < QUAD_SIZE; i++ ) {
+ for( i = 0; i < TGSI_QUAD_SIZE; i++ ) {
mach->Inputs[attrib].xyzw[chan].f[i] = mach->InterpCoefs[attrib].a0[chan];
}
}
@@ -2364,7 +2364,7 @@ exec_declaration(struct tgsi_exec_machine *mach,
assert(decl->Semantic.Index == 0);
assert(first == last);
- for (i = 0; i < QUAD_SIZE; i++) {
+ for (i = 0; i < TGSI_QUAD_SIZE; i++) {
mach->Inputs[first].xyzw[0].f[i] = mach->Face;
}
} else {
@@ -2393,7 +2393,7 @@ exec_declaration(struct tgsi_exec_machine *mach,
return;
}
- for (j = 0; j < NUM_CHANNELS; j++) {
+ for (j = 0; j < TGSI_NUM_CHANNELS; j++) {
if (mask & (1 << j)) {
for (i = first; i <= last; i++) {
eval(mach, i, j);
@@ -2420,7 +2420,7 @@ exec_vector(struct tgsi_exec_machine *mach,
{
unsigned int chan;
- for (chan = 0; chan < NUM_CHANNELS; chan++) {
+ for (chan = 0; chan < TGSI_NUM_CHANNELS; chan++) {
if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
union tgsi_exec_channel dst;
@@ -2446,7 +2446,7 @@ exec_scalar_unary(struct tgsi_exec_machine *mach,
fetch_source(mach, &src, &inst->Src[0], TGSI_CHAN_X, src_datatype);
op(&dst, &src);
- for (chan = 0; chan < NUM_CHANNELS; chan++) {
+ for (chan = 0; chan < TGSI_NUM_CHANNELS; chan++) {
if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
store_dest(mach, &dst, &inst->Dst[0], inst, chan, dst_datatype);
}
@@ -2463,7 +2463,7 @@ exec_vector_unary(struct tgsi_exec_machine *mach,
unsigned int chan;
struct tgsi_exec_vector dst;
- for (chan = 0; chan < NUM_CHANNELS; chan++) {
+ for (chan = 0; chan < TGSI_NUM_CHANNELS; chan++) {
if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
union tgsi_exec_channel src;
@@ -2471,7 +2471,7 @@ exec_vector_unary(struct tgsi_exec_machine *mach,
op(&dst.xyzw[chan], &src);
}
}
- for (chan = 0; chan < NUM_CHANNELS; chan++) {
+ for (chan = 0; chan < TGSI_NUM_CHANNELS; chan++) {
if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
store_dest(mach, &dst.xyzw[chan], &inst->Dst[0], inst, chan, dst_datatype);
}
@@ -2496,7 +2496,7 @@ exec_scalar_binary(struct tgsi_exec_machine *mach,
fetch_source(mach, &src[0], &inst->Src[0], TGSI_CHAN_X, src_datatype);
fetch_source(mach, &src[1], &inst->Src[1], TGSI_CHAN_Y, src_datatype);
op(&dst, &src[0], &src[1]);
- for (chan = 0; chan < NUM_CHANNELS; chan++) {
+ for (chan = 0; chan < TGSI_NUM_CHANNELS; chan++) {
if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
store_dest(mach, &dst, &inst->Dst[0], inst, chan, dst_datatype);
}
@@ -2513,7 +2513,7 @@ exec_vector_binary(struct tgsi_exec_machine *mach,
unsigned int chan;
struct tgsi_exec_vector dst;
- for (chan = 0; chan < NUM_CHANNELS; chan++) {
+ for (chan = 0; chan < TGSI_NUM_CHANNELS; chan++) {
if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
union tgsi_exec_channel src[2];
@@ -2522,7 +2522,7 @@ exec_vector_binary(struct tgsi_exec_machine *mach,
op(&dst.xyzw[chan], &src[0], &src[1]);
}
}
- for (chan = 0; chan < NUM_CHANNELS; chan++) {
+ for (chan = 0; chan < TGSI_NUM_CHANNELS; chan++) {
if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
store_dest(mach, &dst.xyzw[chan], &inst->Dst[0], inst, chan, dst_datatype);
}
@@ -2544,7 +2544,7 @@ exec_vector_trinary(struct tgsi_exec_machine *mach,
unsigned int chan;
struct tgsi_exec_vector dst;
- for (chan = 0; chan < NUM_CHANNELS; chan++) {
+ for (chan = 0; chan < TGSI_NUM_CHANNELS; chan++) {
if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
union tgsi_exec_channel src[3];
@@ -2554,7 +2554,7 @@ exec_vector_trinary(struct tgsi_exec_machine *mach,
op(&dst.xyzw[chan], &src[0], &src[1], &src[2]);
}
}
- for (chan = 0; chan < NUM_CHANNELS; chan++) {
+ for (chan = 0; chan < TGSI_NUM_CHANNELS; chan++) {
if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
store_dest(mach, &dst.xyzw[chan], &inst->Dst[0], inst, chan, dst_datatype);
}
@@ -2578,7 +2578,7 @@ exec_dp3(struct tgsi_exec_machine *mach,
micro_mad(&arg[2], &arg[0], &arg[1], &arg[2]);
}
- for (chan = 0; chan < NUM_CHANNELS; chan++) {
+ for (chan = 0; chan < TGSI_NUM_CHANNELS; chan++) {
if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
store_dest(mach, &arg[2], &inst->Dst[0], inst, chan, TGSI_EXEC_DATA_FLOAT);
}
@@ -2602,7 +2602,7 @@ exec_dp4(struct tgsi_exec_machine *mach,
micro_mad(&arg[2], &arg[0], &arg[1], &arg[2]);
}
- for (chan = 0; chan < NUM_CHANNELS; chan++) {
+ for (chan = 0; chan < TGSI_NUM_CHANNELS; chan++) {
if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
store_dest(mach, &arg[2], &inst->Dst[0], inst, chan, TGSI_EXEC_DATA_FLOAT);
}
@@ -2627,7 +2627,7 @@ exec_dp2a(struct tgsi_exec_machine *mach,
fetch_source(mach, &arg[1], &inst->Src[2], TGSI_CHAN_X, TGSI_EXEC_DATA_FLOAT);
micro_add(&arg[0], &arg[0], &arg[1]);
- for (chan = 0; chan < NUM_CHANNELS; chan++) {
+ for (chan = 0; chan < TGSI_NUM_CHANNELS; chan++) {
if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
store_dest(mach, &arg[0], &inst->Dst[0], inst, chan, TGSI_EXEC_DATA_FLOAT);
}
@@ -2656,7 +2656,7 @@ exec_dph(struct tgsi_exec_machine *mach,
fetch_source(mach, &arg[1], &inst->Src[1], TGSI_CHAN_W, TGSI_EXEC_DATA_FLOAT);
micro_add(&arg[0], &arg[0], &arg[1]);
- for (chan = 0; chan < NUM_CHANNELS; chan++) {
+ for (chan = 0; chan < TGSI_NUM_CHANNELS; chan++) {
if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
store_dest(mach, &arg[0], &inst->Dst[0], inst, chan, TGSI_EXEC_DATA_FLOAT);
}
@@ -2678,7 +2678,7 @@ exec_dp2(struct tgsi_exec_machine *mach,
fetch_source(mach, &arg[1], &inst->Src[1], TGSI_CHAN_Y, TGSI_EXEC_DATA_FLOAT);
micro_mad(&arg[2], &arg[0], &arg[1], &arg[2]);
- for (chan = 0; chan < NUM_CHANNELS; chan++) {
+ for (chan = 0; chan < TGSI_NUM_CHANNELS; chan++) {
if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
store_dest(mach, &arg[2], &inst->Dst[0], inst, chan, TGSI_EXEC_DATA_FLOAT);
}