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author | Rob Clark <[email protected]> | 2014-02-15 19:01:38 -0500 |
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committer | Rob Clark <[email protected]> | 2014-02-16 08:17:23 -0500 |
commit | d73b2c0517feb37a77d1b28b6cc063d699374867 (patch) | |
tree | a5d00295cc0d314df881ba9b3ab6ee355ef5baba /src/gallium/auxiliary/pipe-loader | |
parent | e8cca57a3f709b9b8bce0b25290d6d8091bbdda7 (diff) |
freedreno/a3xx/compiler: use (ss) for WAR hazards
Seems texture sample instructions don't immediately consume there
src(s). In fact, some shaders from blob compiler seem to indiciate that
it does not even count the texture sample instructions when calculating
number of delay slots to fill for non-sample instructions. (Although so
far it seems inconclusive as to whether this is required.)
In particular, when a src register of a previous texture sample
instruction is clobbered, the (ss) bit is needed to synchronize with the
tex pipeline to ensure it has picked up the previous values before they
are overwritten.
Signed-off-by: Rob Clark <[email protected]>
Diffstat (limited to 'src/gallium/auxiliary/pipe-loader')
0 files changed, 0 insertions, 0 deletions