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authorEric Anholt <[email protected]>2020-05-12 13:49:37 -0700
committerMarge Bot <[email protected]>2020-05-13 19:18:16 +0000
commit9da4ce99538179108dc7694affc68a0e081404db (patch)
treea0dee398e154958a5475937819890a3720c9a1a4 /src/freedreno
parentdc7ccdb3f526c2e43aa48a3f5d43fea948012371 (diff)
freedreno: Pull the tile_alignment lookup for a layout to a helper.
The r8g8 case UBWC alignment will be changing in the next commit, so fdl6_get_ubwc_blockwidth needs to start paying attention to r8g8 too. Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4931>
Diffstat (limited to 'src/freedreno')
-rw-r--r--src/freedreno/fdl/fd6_layout.c45
1 files changed, 25 insertions, 20 deletions
diff --git a/src/freedreno/fdl/fd6_layout.c b/src/freedreno/fdl/fd6_layout.c
index c3217e2f1fe..d6a83bfdd4a 100644
--- a/src/freedreno/fdl/fd6_layout.c
+++ b/src/freedreno/fdl/fd6_layout.c
@@ -35,7 +35,7 @@
* missing UBWC blockwidth/blockheight for npot+64 cpp
* missing 96/128 CPP for 8x MSAA with 32_32_32/32_32_32_32
*/
-static const struct {
+static const struct tile_alignment {
unsigned basealign;
unsigned pitchalign;
unsigned heightalign;
@@ -63,12 +63,23 @@ static const struct {
#define RGB_TILE_HEIGHT_ALIGNMENT 16
#define UBWC_PLANE_SIZE_ALIGNMENT 4096
+static const struct tile_alignment *
+fdl6_tile_alignment(struct fdl_layout *layout)
+{
+ debug_assert(layout->cpp < ARRAY_SIZE(tile_alignment));
+
+ if ((layout->cpp == 2) && (util_format_get_nr_components(layout->format) == 2))
+ return &tile_alignment[0];
+ else
+ return &tile_alignment[layout->cpp];
+}
+
static int
-fdl6_pitchalign(struct fdl_layout *layout, int ta, int level)
+fdl6_pitchalign(struct fdl_layout *layout, int level)
{
uint32_t pitchalign = 64;
if (fdl_tile_mode(layout, level))
- pitchalign = tile_alignment[ta].pitchalign;
+ pitchalign = fdl6_tile_alignment(layout)->pitchalign;
return pitchalign;
}
@@ -100,27 +111,22 @@ fdl6_layout(struct fdl_layout *layout,
if (tile_alignment[layout->cpp].ubwc_blockwidth == 0)
layout->ubwc = false;
- int ta = layout->cpp;
-
- /* The z16/r16 formats seem to not play by the normal tiling rules: */
- if ((layout->cpp == 2) && (util_format_get_nr_components(format) == 2))
- ta = 0;
+ const struct tile_alignment *ta = fdl6_tile_alignment(layout);
/* in layer_first layout, the level (slice) contains just one
* layer (since in fact the layer contains the slices)
*/
uint32_t layers_in_level = layout->layer_first ? 1 : array_size;
- debug_assert(ta < ARRAY_SIZE(tile_alignment));
- debug_assert(tile_alignment[ta].pitchalign);
+ debug_assert(ta->pitchalign);
if (layout->tile_mode) {
- layout->base_align = tile_alignment[ta].basealign;
+ layout->base_align = ta->basealign;
} else {
layout->base_align = 64;
}
- uint32_t pitch0 = util_align_npot(width0, fdl6_pitchalign(layout, ta, 0));
+ uint32_t pitch0 = util_align_npot(width0, fdl6_pitchalign(layout, 0));
for (uint32_t level = 0; level < mip_levels; level++) {
uint32_t depth = u_minify(depth0, level);
@@ -140,7 +146,7 @@ fdl6_layout(struct fdl_layout *layout,
uint32_t nblocksy = util_format_get_nblocksy(format, height);
if (tile_mode)
- nblocksy = align(nblocksy, tile_alignment[ta].heightalign);
+ nblocksy = align(nblocksy, ta->heightalign);
/* The blits used for mem<->gmem work at a granularity of
* 32x32, which can cause faults due to over-fetch on the
@@ -154,7 +160,7 @@ fdl6_layout(struct fdl_layout *layout,
uint32_t nblocksx =
util_align_npot(util_format_get_nblocksx(format, u_minify(pitch0, level)),
- fdl6_pitchalign(layout, ta, level));
+ fdl6_pitchalign(layout, level));
slice->offset = layout->size;
uint32_t blocks = nblocksx * nblocksy;
@@ -183,11 +189,9 @@ fdl6_layout(struct fdl_layout *layout,
/* with UBWC every level is aligned to 4K */
layout->size = align(layout->size, 4096);
- uint32_t block_width = tile_alignment[ta].ubwc_blockwidth;
- uint32_t block_height = tile_alignment[ta].ubwc_blockheight;
- uint32_t meta_pitch = align(DIV_ROUND_UP(width, block_width),
+ uint32_t meta_pitch = align(DIV_ROUND_UP(width, ta->ubwc_blockwidth),
RGB_TILE_WIDTH_ALIGNMENT);
- uint32_t meta_height = align(DIV_ROUND_UP(height, block_height),
+ uint32_t meta_height = align(DIV_ROUND_UP(height, ta->ubwc_blockheight),
RGB_TILE_HEIGHT_ALIGNMENT);
/* it looks like mipmaps need alignment to power of two
@@ -227,6 +231,7 @@ void
fdl6_get_ubwc_blockwidth(struct fdl_layout *layout,
uint32_t *blockwidth, uint32_t *blockheight)
{
- *blockwidth = tile_alignment[layout->cpp].ubwc_blockwidth;
- *blockheight = tile_alignment[layout->cpp].ubwc_blockheight;
+ const struct tile_alignment *ta = fdl6_tile_alignment(layout);
+ *blockwidth = ta->ubwc_blockwidth;
+ *blockheight = ta->ubwc_blockheight;
}