diff options
| author | Hyunjun Ko <[email protected]> | 2019-08-30 08:29:10 +0000 |
|---|---|---|
| committer | Neil Roberts <[email protected]> | 2019-11-20 14:09:43 +0100 |
| commit | 407f8c71d3f3687f2fd134c42e5d12921e1c083d (patch) | |
| tree | 695626cb664286c817760fa98ec48a83760a6ca2 /src/freedreno | |
| parent | d0f38394b146fa61197c66a0a0f95fa83f58cec8 (diff) | |
freedreno/ir3: fixup when changing to mad.f16
Reviewed-by: Rob Clark <[email protected]>
Diffstat (limited to 'src/freedreno')
| -rw-r--r-- | src/freedreno/ir3/ir3_ra.c | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/src/freedreno/ir3/ir3_ra.c b/src/freedreno/ir3/ir3_ra.c index 67d8a93884e..c3d8e88f54a 100644 --- a/src/freedreno/ir3/ir3_ra.c +++ b/src/freedreno/ir3/ir3_ra.c @@ -982,7 +982,11 @@ static void fixup_half_instr_dst(struct ir3_instruction *instr) case 3: switch (instr->opc) { case OPC_MAD_F32: - instr->opc = OPC_MAD_F16; + /* Available for that dest is half and srcs are full. + * eg. mad.f32 hr0, r0.x, r0.y, r0.z + */ + if (instr->regs[1]->flags & IR3_REG_HALF) + instr->opc = OPC_MAD_F16; break; case OPC_SEL_B32: instr->opc = OPC_SEL_B16; |