diff options
| author | Connor Abbott <[email protected]> | 2020-06-23 17:09:10 +0200 |
|---|---|---|
| committer | Marge Bot <[email protected]> | 2020-06-26 09:34:33 +0000 |
| commit | 2841bb1fac81c32b736f593507d46c46e7488f68 (patch) | |
| tree | e37ecf259a620347a50449266ed197739fdb716a /src/freedreno | |
| parent | 4845f184d767edebb952a0a1a0f9af769b651656 (diff) | |
ir3, freedreno: Round up constlen earlier
Prevents problems when calculating whether we overflow the shared limit.
Note that on a6xx, the macros handle the assert for us.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5607>
Diffstat (limited to 'src/freedreno')
| -rw-r--r-- | src/freedreno/ir3/ir3_shader.c | 8 | ||||
| -rw-r--r-- | src/freedreno/vulkan/tu_clear_blit.c | 6 | ||||
| -rw-r--r-- | src/freedreno/vulkan/tu_pipeline.c | 2 |
3 files changed, 12 insertions, 4 deletions
diff --git a/src/freedreno/ir3/ir3_shader.c b/src/freedreno/ir3/ir3_shader.c index 0fe51e9378a..5afb5992851 100644 --- a/src/freedreno/ir3/ir3_shader.c +++ b/src/freedreno/ir3/ir3_shader.c @@ -26,6 +26,7 @@ #include "util/u_atomic.h" #include "util/u_string.h" +#include "util/u_math.h" #include "util/u_memory.h" #include "util/format/u_format.h" @@ -140,6 +141,13 @@ void * ir3_shader_assemble(struct ir3_shader_variant *v) */ v->constlen = MAX2(v->constlen, v->info.max_const + 1); + /* On a4xx and newer, constlen must be a multiple of 16 dwords even though + * uploads are in units of 4 dwords. Round it up here to make calculations + * regarding the shared constlen simpler. + */ + if (gpu_id >= 400) + v->constlen = align(v->constlen, 4); + fixup_regfootprint(v); return bin; diff --git a/src/freedreno/vulkan/tu_clear_blit.c b/src/freedreno/vulkan/tu_clear_blit.c index be2222b407d..e93ef73c141 100644 --- a/src/freedreno/vulkan/tu_clear_blit.c +++ b/src/freedreno/vulkan/tu_clear_blit.c @@ -327,7 +327,7 @@ r3d_common(struct tu_cmd_buffer *cmd, struct tu_cs *cs, bool blit, uint32_t num_ struct ir3_shader_variant vs = { .type = MESA_SHADER_VERTEX, .instrlen = 1, - .constlen = 2, + .constlen = 4, .info.max_reg = 1, .inputs_count = 1, .inputs[0] = { @@ -360,7 +360,7 @@ r3d_common(struct tu_cmd_buffer *cmd, struct tu_cs *cs, bool blit, uint32_t num_ struct ir3_shader_variant fs = { .type = MESA_SHADER_FRAGMENT, .instrlen = 1, /* max of 9 instructions with num_rts = 8 */ - .constlen = num_rts, + .constlen = align(num_rts, 4), .info.max_reg = MAX2(num_rts, 1) - 1, .total_in = blit ? 2 : 0, .num_samp = blit ? 1 : 0, @@ -389,7 +389,7 @@ r3d_common(struct tu_cmd_buffer *cmd, struct tu_cs *cs, bool blit, uint32_t num_ struct ir3_shader_variant gs_shader = { .type = MESA_SHADER_GEOMETRY, .instrlen = 1, - .constlen = 2, + .constlen = 4, .info.max_reg = 1, .inputs_count = 1, .inputs[0] = { diff --git a/src/freedreno/vulkan/tu_pipeline.c b/src/freedreno/vulkan/tu_pipeline.c index 964d7438ab6..811c777b3e0 100644 --- a/src/freedreno/vulkan/tu_pipeline.c +++ b/src/freedreno/vulkan/tu_pipeline.c @@ -412,7 +412,7 @@ tu6_emit_xs_config(struct tu_cs *cs, tu_cs_emit(cs, xs->instrlen); tu_cs_emit_pkt4(cs, cfg->reg_hlsq_xs_ctrl, 1); - tu_cs_emit(cs, A6XX_HLSQ_VS_CNTL_CONSTLEN(align(xs->constlen, 4)) | + tu_cs_emit(cs, A6XX_HLSQ_VS_CNTL_CONSTLEN(xs->constlen) | A6XX_HLSQ_VS_CNTL_ENABLED); /* emit program binary |