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authorJonathan Marek <[email protected]>2019-09-24 14:39:55 -0400
committerJonathan Marek <[email protected]>2019-09-24 22:32:09 -0400
commite353fd096d6db1b19305cb1a634e25f2026ab8a7 (patch)
tree7d0658c45c21a6c6ede5023b2701015750b4ae60 /src/freedreno/vulkan/tu_cmd_buffer.c
parentf510901dc247b038715c1397b1c99746d5ed8df4 (diff)
turnip: use image tile_mode for gmem configuration
Fixes at least this deqp test: dEQP-VK.api.smoke.triangle Signed-off-by: Jonathan Marek <[email protected]> Reviewed-by: Kristian H. Kristensen <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
Diffstat (limited to 'src/freedreno/vulkan/tu_cmd_buffer.c')
-rw-r--r--src/freedreno/vulkan/tu_cmd_buffer.c8
1 files changed, 3 insertions, 5 deletions
diff --git a/src/freedreno/vulkan/tu_cmd_buffer.c b/src/freedreno/vulkan/tu_cmd_buffer.c
index fe436e595ec..167ad1873d2 100644
--- a/src/freedreno/vulkan/tu_cmd_buffer.c
+++ b/src/freedreno/vulkan/tu_cmd_buffer.c
@@ -440,7 +440,7 @@ tu6_emit_mrt(struct tu_cmd_buffer *cmd, struct tu_cs *cs)
const struct tu_image_view *iview = fb->attachments[a].attachment;
const struct tu_image_level *slice =
&iview->image->levels[iview->base_mip];
- const enum a6xx_tile_mode tile_mode = TILE6_LINEAR;
+ const enum a6xx_tile_mode tile_mode = iview->image->tile_mode;
uint32_t stride = 0;
uint32_t offset = 0;
@@ -606,7 +606,6 @@ tu6_emit_blit_info(struct tu_cmd_buffer *cmd,
const uint32_t offset = slice->offset + slice->size * iview->base_layer;
const uint32_t stride =
slice->pitch * vk_format_get_blocksize(iview->vk_format);
- const enum a6xx_tile_mode tile_mode = TILE6_LINEAR;
const enum a3xx_msaa_samples samples = tu6_msaa_samples(1);
tu_cs_emit_pkt4(cs, REG_A6XX_RB_BLIT_INFO, 1);
@@ -618,7 +617,7 @@ tu6_emit_blit_info(struct tu_cmd_buffer *cmd,
assert(format && format->rb >= 0);
tu_cs_emit_pkt4(cs, REG_A6XX_RB_BLIT_DST_INFO, 5);
- tu_cs_emit(cs, A6XX_RB_BLIT_DST_INFO_TILE_MODE(tile_mode) |
+ tu_cs_emit(cs, A6XX_RB_BLIT_DST_INFO_TILE_MODE(iview->image->tile_mode) |
A6XX_RB_BLIT_DST_INFO_SAMPLES(samples) |
A6XX_RB_BLIT_DST_INFO_COLOR_FORMAT(format->rb) |
A6XX_RB_BLIT_DST_INFO_COLOR_SWAP(format->swap));
@@ -638,7 +637,6 @@ tu6_emit_blit_clear(struct tu_cmd_buffer *cmd,
uint32_t gmem_offset,
const VkClearValue *clear_value)
{
- const enum a6xx_tile_mode tile_mode = TILE6_LINEAR;
const enum a3xx_msaa_samples samples = tu6_msaa_samples(1);
const struct tu_native_format *format =
@@ -648,7 +646,7 @@ tu6_emit_blit_clear(struct tu_cmd_buffer *cmd,
const enum a3xx_color_swap swap = WZYX;
tu_cs_emit_pkt4(cs, REG_A6XX_RB_BLIT_DST_INFO, 1);
- tu_cs_emit(cs, A6XX_RB_BLIT_DST_INFO_TILE_MODE(tile_mode) |
+ tu_cs_emit(cs, A6XX_RB_BLIT_DST_INFO_TILE_MODE(iview->image->tile_mode) |
A6XX_RB_BLIT_DST_INFO_SAMPLES(samples) |
A6XX_RB_BLIT_DST_INFO_COLOR_FORMAT(format->rb) |
A6XX_RB_BLIT_DST_INFO_COLOR_SWAP(swap));