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authorJonathan Marek <[email protected]>2020-06-19 13:26:50 -0400
committerMarge Bot <[email protected]>2020-06-20 19:31:48 +0000
commitffecaedf697e7ab072f9a13cc2613f59f374ca44 (patch)
tree759fc6bbea0f7ad4255524f22f46074553627bc3 /src/freedreno/registers
parentc977567db65e3430d1b7323f698d17bea58624e9 (diff)
freedreno/a6xx: VSC "STRM_ARRAY_PITCH" is "STRM_LIMIT"
This was being set wrong in both freedreno and turnip, and setting it correctly should avoid hangs when there is overflow. Signed-off-by: Jonathan Marek <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5565>
Diffstat (limited to 'src/freedreno/registers')
-rw-r--r--src/freedreno/registers/a6xx.xml6
1 files changed, 4 insertions, 2 deletions
diff --git a/src/freedreno/registers/a6xx.xml b/src/freedreno/registers/a6xx.xml
index 382dc7e1fb1..de4580ae984 100644
--- a/src/freedreno/registers/a6xx.xml
+++ b/src/freedreno/registers/a6xx.xml
@@ -1822,17 +1822,19 @@ to upconvert to 32b float internally?
Compared to a5xx and earlier, we just program the address of the first
stream and hw adds (pipe_num * VSC_*_STRM_PITCH)
+
+ LIMIT is set to PITCH - 64, to make room for a bit of overflow
-->
<reg32 offset="0x0c30" name="VSC_PRIM_STRM_ADDRESS_LO"/>
<reg32 offset="0x0c31" name="VSC_PRIM_STRM_ADDRESS_HI"/>
<reg64 offset="0x0c30" name="VSC_PRIM_STRM_ADDRESS" type="waddress"/>
<reg32 offset="0x0c32" name="VSC_PRIM_STRM_PITCH"/>
- <reg32 offset="0x0c33" name="VSC_PRIM_STRM_ARRAY_PITCH" shr="4" type="uint"/>
+ <reg32 offset="0x0c33" name="VSC_PRIM_STRM_LIMIT"/>
<reg32 offset="0x0c34" name="VSC_DRAW_STRM_ADDRESS_LO"/>
<reg32 offset="0x0c35" name="VSC_DRAW_STRM_ADDRESS_HI"/>
<reg64 offset="0x0c34" name="VSC_DRAW_STRM_ADDRESS" type="waddress"/>
<reg32 offset="0x0c36" name="VSC_DRAW_STRM_PITCH"/>
- <reg32 offset="0x0c37" name="VSC_DRAW_STRM_ARRAY_PITCH" shr="4" type="uint"/>
+ <reg32 offset="0x0c37" name="VSC_DRAW_STRM_LIMIT"/>
<array offset="0x0c38" name="VSC_STATE" stride="1" length="32">
<doc>