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authorConnor Abbott <[email protected]>2019-12-17 13:02:56 +0100
committerConnor Abbott <[email protected]>2019-12-18 23:09:05 +0100
commit648cc22afb6855bf68c83912502454c23adad951 (patch)
tree0212ddaf32b8eb00b9d5fc41d9c5c7ec088e1c31 /src/freedreno/registers
parent4c5ac156c36b697e3605a8143aafd332dd1a15e7 (diff)
freedreno: Fix CP_MEM_TO_REG flag definitions
These actually mean something completely different, at least on A5xx and A6xx. The only other usage of the old flags on something older than A6xx was a typo, so I don't know if it was always this way, but at the same time it means that we don't have to worry too much about that. Reviewed-by: Eric Anholt <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3116> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3116>
Diffstat (limited to 'src/freedreno/registers')
-rw-r--r--src/freedreno/registers/adreno_pm4.xml6
1 files changed, 4 insertions, 2 deletions
diff --git a/src/freedreno/registers/adreno_pm4.xml b/src/freedreno/registers/adreno_pm4.xml
index 533dcf0fb38..643d2b01b4c 100644
--- a/src/freedreno/registers/adreno_pm4.xml
+++ b/src/freedreno/registers/adreno_pm4.xml
@@ -966,8 +966,10 @@ opcode: CP_LOAD_STATE4 (30) (4 dwords)
<bitfield name="REG" low="0" high="15" type="hex"/>
<!-- number of registers/dwords copied is max(CNT, 1). -->
<bitfield name="CNT" low="19" high="29" type="uint"/>
- <bitfield name="64B" pos="30" type="boolean"/>
- <bitfield name="ACCUMULATE" pos="31" type="boolean"/>
+ <!-- shift each DWORD left by 2 while copying -->
+ <bitfield name="SHIFT_BY_2" pos="30" type="boolean"/>
+ <!-- does the same thing as CP_MEM_TO_MEM::UNK31 -->
+ <bitfield name="UNK31" pos="31" type="boolean"/>
</reg32>
<reg32 offset="1" name="1">
<bitfield name="SRC" low="0" high="31"/>