diff options
| author | Hyunjun Ko <[email protected]> | 2020-05-07 06:06:59 +0000 |
|---|---|---|
| committer | Marge Bot <[email protected]> | 2020-05-08 17:45:03 +0000 |
| commit | 094c7646a3ae4980f76605a922572fe2ed78f6f1 (patch) | |
| tree | 5a33b702839a74969ce74456055fb4b18d03ed91 /src/freedreno/registers | |
| parent | ab5590e92bc36e2b785a088751c433d31989d778 (diff) | |
freedreno,tu: Don't request fragcoord components not being read.
v1. Replace the existed bool type with new bitfield and edit register
files to take a mask instead of duplicating codes to do masking.
v2. Use fragcoord_compmask != 0 instead of fragcoord_compmask > 0 since
it represents a bitfield.
Tested with
dEQP-VK.glsl.builtin_var.simple.fragcoord_xyz/w
dEQP-GLES2.functional.shaders.builtin_variable.fragcoord_xyz/w
Closes: #2680
Signed-off-by: Hyunjun Ko <[email protected]>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4723>
Diffstat (limited to 'src/freedreno/registers')
| -rw-r--r-- | src/freedreno/registers/a3xx.xml | 5 | ||||
| -rw-r--r-- | src/freedreno/registers/a4xx.xml | 6 | ||||
| -rw-r--r-- | src/freedreno/registers/a5xx.xml | 10 | ||||
| -rw-r--r-- | src/freedreno/registers/a6xx.xml | 10 |
4 files changed, 6 insertions, 25 deletions
diff --git a/src/freedreno/registers/a3xx.xml b/src/freedreno/registers/a3xx.xml index 93b14e139ff..3605e3ae409 100644 --- a/src/freedreno/registers/a3xx.xml +++ b/src/freedreno/registers/a3xx.xml @@ -870,10 +870,7 @@ xsi:schemaLocation="http://nouveau.freedesktop.org/ rules-ng.xsd"> controlling blend or readback from GMEM?? --> <bitfield name="ENABLE_GMEM" pos="13" type="boolean"/> - <bitfield name="XCOORD" pos="14" type="boolean"/> - <bitfield name="YCOORD" pos="15" type="boolean"/> - <bitfield name="ZCOORD" pos="16" type="boolean"/> - <bitfield name="WCOORD" pos="17" type="boolean"/> + <bitfield name="COORD_MASK" low="14" high="17" type="hex"/> <bitfield name="I_CLAMP_ENABLE" pos="19" type="boolean"/> <bitfield name="COV_VALUE_OUTPUT_ENABLE" pos="20" type="boolean"/> <bitfield name="ALPHA_TEST" pos="22" type="boolean"/> diff --git a/src/freedreno/registers/a4xx.xml b/src/freedreno/registers/a4xx.xml index 0fa914847f3..1c2c48c5e50 100644 --- a/src/freedreno/registers/a4xx.xml +++ b/src/freedreno/registers/a4xx.xml @@ -911,11 +911,7 @@ perhaps they should be taken with a grain of salt <bitfield name="SAMPLES" low="13" high="15" type="uint"/> </reg32> <reg32 offset="0x20a3" name="RB_RENDER_CONTROL2"> - <bitfield name="XCOORD" pos="0" type="boolean"/> - <bitfield name="YCOORD" pos="1" type="boolean"/> - <!-- assuming zcoord/wcoord follows.. --> - <bitfield name="ZCOORD" pos="2" type="boolean"/> - <bitfield name="WCOORD" pos="3" type="boolean"/> + <bitfield name="COORD_MASK" low="0" high="3" type="hex"/> <bitfield name="SAMPLEMASK" pos="4" type="boolean"/> <bitfield name="FACENESS" pos="5" type="boolean"/> <bitfield name="SAMPLEID" pos="6" type="boolean"/> diff --git a/src/freedreno/registers/a5xx.xml b/src/freedreno/registers/a5xx.xml index 42726fcebac..945e09e5b36 100644 --- a/src/freedreno/registers/a5xx.xml +++ b/src/freedreno/registers/a5xx.xml @@ -1828,10 +1828,7 @@ xsi:schemaLocation="http://nouveau.freedesktop.org/ rules-ng.xsd"> Also, when that happens, VARYING bits are turned on as well. --> <bitfield name="UNK3" pos="3" type="boolean"/> - <bitfield name="XCOORD" pos="6" type="boolean"/> - <bitfield name="YCOORD" pos="7" type="boolean"/> - <bitfield name="ZCOORD" pos="8" type="boolean"/> - <bitfield name="WCOORD" pos="9" type="boolean"/> + <bitfield name="COORD_MASK" low="6" high="9" type="hex"/> </reg32> <reg32 offset="0xe006" name="GRAS_CL_GUARDBAND_CLIP_ADJ"> <bitfield name="HORZ" low="0" high="9" type="uint"/> @@ -1982,10 +1979,7 @@ bit 7 for RECTLIST (clear) when z32s8 (used for clear of depth32? not set Also, when that happens, VARYING bits are turned on as well. --> <bitfield name="UNK3" pos="3" type="boolean"/> - <bitfield name="XCOORD" pos="6" type="boolean"/> - <bitfield name="YCOORD" pos="7" type="boolean"/> - <bitfield name="ZCOORD" pos="8" type="boolean"/> - <bitfield name="WCOORD" pos="9" type="boolean"/> + <bitfield name="COORD_MASK" low="6" high="9" type="hex"/> </reg32> <reg32 offset="0xe145" name="RB_RENDER_CONTROL1"> <bitfield name="SAMPLEMASK" pos="0" type="boolean"/> diff --git a/src/freedreno/registers/a6xx.xml b/src/freedreno/registers/a6xx.xml index fdb091c5b56..a831ccc845d 100644 --- a/src/freedreno/registers/a6xx.xml +++ b/src/freedreno/registers/a6xx.xml @@ -1855,10 +1855,7 @@ to upconvert to 32b float internally? <bitfield name="SIZE" pos="3" type="boolean"/> <!-- b5 set ofr interpolateAt{Offset,Sample}() if in per-sample mode --> <bitfield name="SIZE_PERSAMP" pos="5" type="boolean"/> - <bitfield name="XCOORD" pos="6" type="boolean"/> - <bitfield name="YCOORD" pos="7" type="boolean"/> - <bitfield name="ZCOORD" pos="8" type="boolean"/> - <bitfield name="WCOORD" pos="9" type="boolean"/> + <bitfield name="COORD_MASK" low="6" high="9" type="hex"/> </reg32> <reg32 offset="0x8006" name="GRAS_CL_GUARDBAND_CLIP_ADJ"> <bitfield name="HORZ" low="0" high="9" type="uint"/> @@ -2083,10 +2080,7 @@ to upconvert to 32b float internally? <bitfield name="SIZE" pos="3" type="boolean"/> <!-- b5 set ofr interpolateAt{Offset,Sample}() if in per-sample mode --> <bitfield name="SIZE_PERSAMP" pos="5" type="boolean"/> - <bitfield name="XCOORD" pos="6" type="boolean"/> - <bitfield name="YCOORD" pos="7" type="boolean"/> - <bitfield name="ZCOORD" pos="8" type="boolean"/> - <bitfield name="WCOORD" pos="9" type="boolean"/> + <bitfield name="COORD_MASK" low="6" high="9" type="hex"/> <bitfield name="UNK10" pos="10" type="boolean"/> </reg32> <reg32 offset="0x880a" name="RB_RENDER_CONTROL1"> |